Lines Matching refs:U32
117 U32 u32Normal;
118 U32 u32Error;
119 U32 u32Reclaim;
120 U32 u32LostIAA;
123 U32 u32Complete;
124 U32 u32Unlink;
141 U32 u32PeriodicSize;
142 U32 *pPeriodic; /* hw periodic table */
144 U32 u32IThresh; /* uframes HC might cache */
147 U32 u32PeriodicSched; /* periodic activity count */
150 U32 u32ResetEnd [EHCI_MAX_ROOT_PORTS];
156 U32 hcs_params; /* cached register copy */
163 U32 u32Actions;
164 U32 u32Stamp;
171 U32 ehci_port_not_change_cnt;
172 U32 u32MoreCSC;
173 U32 u32random_frm; // to generate random start frame
220 ms_clear_bit (eAction, &ehci->u32Actions, U32); in ms_timer_action_done()
234 U32 u32Time; in ms_timer_action()
256 U32 u32Time; in ms_timer_action()
278 && (u32Time+jiffies) > (U32) ehci->stWatchdog.base_jiffies in ms_timer_action()
296 U32 hcsparams; /* HCSPARAMS : [04h] */
297 U32 hcc_params; /* HCCPARAMS : [08h] */
321 U32 usbcmd; /* USB Command : [00h] */
322 U32 usbsts; /* USB Status : [04h] */
323 U32 usbintr; /* USB Interrupt Enable : [08h] */
324 U32 frindex; /* USB Frame Index : [0Ch] */
325 U32 ctrldssegment; /* 4G Segment Selector: [10h] */
326 U32 periodiclistbase; /* Frame List Base Address : [14h] */
327 U32 asynclistaddr; /* Next Asynchronous List Address : [18h] */
328 U32 reserved2; /* reserve, [1Ch] */
329 U32 portsc[1]; /* port status/control [20h], Faraday change*/
330 U32 hcmisc;
331 U32 reserved[2];
333 U32 bus_control; /* Bus monitor control : [30h] */
335 U32 reserved1 [3];
336 U32 test_register; /* Configured Flag Register : [40h], Faraday's test register, yuwen */
387 U32 hw_next_qtd;
388 U32 hw_alt_next_qtd;
389 U32 hw_token;
390 U32 hw_buffer [5];
404 #define QTD_TOGGLE ((U32)1 << 31)
406 #define QTD_IOC ((U32)1 << 15)
413 #define QTD_STS_ACT ((U32)1 << 7)
414 #define QTD_STS_HALT ((U32)1 << 6)
415 #define QTD_STS_DATERR ((U32)1 << 5)
416 #define QTD_STS_BABBLE ((U32)1 << 4)
417 #define QTD_STS_XACTERR ((U32)1 << 3)
418 #define QTD_STS_MISSMF ((U32)1 << 2)
419 #define QTD_STS_SPLITXST ((U32)1 << 1)
420 #define QTD_STS_PERR ((U32)1 << 0)
431 #define QH_NEXT(dma) ((((U32)dma)&~0x01f)|QH_TYPE)
437 U32 *hw_next;
444 U32 hw_next_qh;
445 U32 hw_ep_state1;
446 U32 hw_ep_state2;
447 U32 hw_current_qtd;
448 U32 hw_next_qtd;
449 U32 hw_alt_next_qtd;
450 U32 hw_token;
451 U32 hw_bufptr_lo [5];
460 U32 u32Stamp;