5 #define set_cpsr(value) asm volatile ("msr cpsr, %0": :"r"(value))  argument
8         unsigned long value; \
9         asm volatile ("mrs\t\t%0,cpsr": "=r"(value) : ); \
10         value; \
12 #define mem_barrier(value) asm volatile ("mcr p15, 0, %0, c7, c10, 4": :"r"(value))  argument
16 #define mtsr(value) asm volatile (" mtc0 %0, $12" : : "r" (value))  argument
19         unsigned long value; \
20         asm volatile ("mfc0\t\t%0,$12" : "=r" (value) : ); \
21         value; \
24 #define mtcause(value) asm volatile (" mtc0 %0, $13" : : "r" (value))  argument
27         unsigned long value; \
28         asm volatile ("mfc0\t\t%0,$13" : "=r" (value) : ); \
29         value; \
32 #define mtepc(value) asm volatile (" mtc0 %0, $14" : : "r" (value))  argument
35         unsigned long value; \
36         asm volatile ("mfc0\t\t%0,$14" : "=r" (value) : ); \
37         value; \
46 #define mtspr(spr, value) \  argument
47     __asm__ __volatile__ ("l.mtspr\t\t%0,%1,0" : : "r" (spr), "r" (value))
51         unsigned long value; \
52         __asm__ __volatile__ ("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr) : "memory"); \
53         value; \