Lines Matching refs:u16RegShift
532 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_SelPad() local
544 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()
549 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()
595 …uxReg) = (TSP_TSP5_REG(u16MuxReg) & ~(u16MuxRegMask << u16RegShift)) | (u16InPadSel << u16RegShift… in HAL_TSO_SelPad()
604 …uxReg) = (TSP_TSP5_REG(u16MuxReg) & ~(u16MuxRegMask << u16RegShift)) | (u16InPadSel << u16RegShift… in HAL_TSO_SelPad()
611 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_Set_InClk() local
622 u16RegShift = REG_CLKGEN1_TSO_IN_SHIFT; in HAL_TSO_Set_InClk()
628 u16RegShift = REG_CLKGEN1_TSO1_IN_SHIFT; in HAL_TSO_Set_InClk()
639 u16value |= ((REG_CLKGEN1_TSO1_IN_DISABLE << u16RegShift) & 0xFFFFUL); in HAL_TSO_Set_InClk()
643 u16value |= (u16ClkSel << u16RegShift); in HAL_TSO_Set_InClk()
646 u16value |= ((REG_CLKGEN1_TSO1_IN_INVERT << u16RegShift) & 0xFFFFUL); in HAL_TSO_Set_InClk()
667 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_GetInputTSIF_Status() local
677 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
682 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
687 *pu16Pad = (TSP_TSP5_REG(u16Reg) & (u16RegMask << u16RegShift)) >> u16RegShift; in HAL_TSO_GetInputTSIF_Status()