Lines Matching refs:u16RegMask
532 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_SelPad() local
560 u16RegMask = REG_TOP_TS0_CONFIG_MASK; in HAL_TSO_SelPad()
572 u16RegMask = REG_TOP_TS1_CONFIG_MASK; in HAL_TSO_SelPad()
584 u16RegMask = REG_TOP_TS2_CONFIG_MASK; in HAL_TSO_SelPad()
602 TSO_TOP_REG(u16Reg) = (TSO_TOP_REG(u16Reg) & ~u16RegMask) | u16data; in HAL_TSO_SelPad()
611 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_Set_InClk() local
621 u16RegMask = REG_CLKGEN1_TSO_IN_MASK; in HAL_TSO_Set_InClk()
623 u16value = TSO_CLKGEN1_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()
627 u16RegMask = REG_CLKGEN1_TSO1_IN_MASK; in HAL_TSO_Set_InClk()
629 u16value = TSO_CLKGEN1_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()
667 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_GetInputTSIF_Status() local
676 u16RegMask = REG_TSP5_TSOIN_MUX_MASK; in HAL_TSO_GetInputTSIF_Status()
681 u16RegMask = REG_TSP5_TSOIN_MUX_MASK; in HAL_TSO_GetInputTSIF_Status()
687 *pu16Pad = (TSP_TSP5_REG(u16Reg) & (u16RegMask << u16RegShift)) >> u16RegShift; in HAL_TSO_GetInputTSIF_Status()