Lines Matching refs:u16RegShift
535 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_SelPad() local
542 u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT; in HAL_TSO_SelPad()
545 u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT; in HAL_TSO_SelPad()
548 u16RegShift = REG_TSP5_TSOIN2_MUX_SHIFT; in HAL_TSO_SelPad()
630 …REG(REG_TSP5_TSOIN_MUX) & ~(REG_TSP5_TSOIN_MUX_MASK << u16RegShift)) | (u16InPadSel << u16RegShift… in HAL_TSO_SelPad()
639 …) = (TSP_TSP5_REG(REG_TSP5_TSOIN_MUX) & ~(REG_TSP5_TSOIN_MUX_MASK)) | (u16InPadSel << u16RegShift); in HAL_TSO_SelPad()
646 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_Set_InClk() local
657 u16RegShift = REG_CLKGEN0_TSO_IN_SHIFT; in HAL_TSO_Set_InClk()
663 u16RegShift = REG_CLKGEN2_TSO1_IN_SHIFT; in HAL_TSO_Set_InClk()
669 u16RegShift = REG_CLKGEN2_TSO2_IN_SHIFT; in HAL_TSO_Set_InClk()
680 u16value |= ((REG_CLKGEN2_TSO1_IN_DISABLE << u16RegShift) & 0xFFFFUL); in HAL_TSO_Set_InClk()
689 u16value |= (u16ClkSel << u16RegShift); in HAL_TSO_Set_InClk()
692 u16value |= ((REG_CLKGEN2_TSO1_IN_INVERT << u16RegShift) & 0xFFFFUL); in HAL_TSO_Set_InClk()
714 MS_U16 u16Reg, u16RegMask, u16RegShift; in HAL_TSO_GetInputTSIF_Status() local
724 u16RegShift = REG_TOP_TSO_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
729 u16RegShift = REG_TOP_TSO1_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
734 u16RegShift = REG_TOP_TSO2_MUX_SHIFT; in HAL_TSO_GetInputTSIF_Status()
740 *pu16Pad = (TSP_TOP_REG(u16Reg) & u16RegMask) >> u16RegShift; in HAL_TSO_GetInputTSIF_Status()