Lines Matching refs:TSP_CLKGEN0_REG
489 …TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) & ~REG_CLKGEN0_TSP_CL… in HAL_TSP_Power()
493 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) & ~REG_CLKGEN0_STC0… in HAL_TSP_Power()
496 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) & ~REG_CLKGEN0_STC1… in HAL_TSP_Power()
518 …TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) & ~REG_CLKGEN0_ST… in HAL_TSP_Power()
521 …TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) & ~REG_CLKGEN0_… in HAL_TSP_Power()
525 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
526 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
527 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
528 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
529 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
530 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
531 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_Power()
534 …TSP_CLKGEN0_REG(REG_CLKGEN0_TSO0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TSO0_CLK) & ~REG_CLKGEN0_TS_M… in HAL_TSP_Power()
600 …TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
603 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
604 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
613 …TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
616 …TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK),(REG_CLKGE… in HAL_TSP_Power()
619 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
620 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
621 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
622 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
623 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
624 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
625 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
628 …TSP_CLKGEN0_REG(REG_CLKGEN0_TSO0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TSO0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
884 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
887 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
890 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
893 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
896 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
899 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
902 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) & ~(REG_CLKGEN0_TS_MA… in HAL_TSP_TSIF_SelPad()
931 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
934 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
937 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS2_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
940 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS3_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
943 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
946 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS5_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
949 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
960 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
963 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
966 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS2_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
969 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS3_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
972 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
975 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS5_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
978 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()
1013 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1016 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1019 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS2_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1022 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS3_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1025 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1028 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS5_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1031 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1059 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS0_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1062 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS1_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1065 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS2_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1068 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS3_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1071 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS4_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1074 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS5_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1077 …u16ClkSrc = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS6_SHIFT)) … in HAL_TSP_TSIF_SelPad_ClkDis()
1096 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS0_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1099 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS1_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1102 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS2_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1105 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS3_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS3_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1108 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1111 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS5_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS5_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
1114 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS6_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS6_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
2284 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_STC_Init()
2285 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_STC_Init()
2295 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L) = 0x0000; in HAL_TSP_STC_Init()
2296 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H) = 0x2800; in HAL_TSP_STC_Init()
2297 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) = 0x0000; in HAL_TSP_STC_Init()
2298 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = 0x2800; in HAL_TSP_STC_Init()
2313 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC_CW_EN); in HAL_TSP_STC_Init()
2314 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_EN; in HAL_TSP_STC_Init()
2315 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC_CW_EN); in HAL_TSP_STC_Init()
2316 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
2317 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_STC_Init()
2318 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_STC_Init()
2341 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_STC_Init()
2342 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_STC_Init()
2363 *u32Sync = TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L); in HAL_TSP_GetSTCSynth()
2364 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
2368 *u32Sync = TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L); in HAL_TSP_GetSTCSynth()
2369 *u32Sync |= TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()
2410 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC_CW_SEL; in HAL_TSP_SetSTCSynth()
2413 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_L) = u32Sync & 0xFFFF; in HAL_TSP_SetSTCSynth()
2414 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
2417 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC_CW_EN); in HAL_TSP_SetSTCSynth()
2418 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC_CW_EN; in HAL_TSP_SetSTCSynth()
2419 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC_CW_EN); in HAL_TSP_SetSTCSynth()
2423 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~REG_CLKGEN0_STC1_CW_SEL; in HAL_TSP_SetSTCSynth()
2426 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_L) = u32Sync & 0xFFFF; in HAL_TSP_SetSTCSynth()
2427 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_STC1_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()
2430 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()
2431 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) |= REG_CLKGEN0_STC1_CW_EN; in HAL_TSP_SetSTCSynth()
2432 TSP_CLKGEN0_REG(REG_CLKGEN0_DC0_SYTNTH) &= ~(REG_CLKGEN0_STC1_CW_EN); in HAL_TSP_SetSTCSynth()