Lines Matching refs:RegPvrCtrl
290 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u8Idx < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_TSP_HwPatch() local
294 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_RECORD_TS); in HAL_TSP_HwPatch()
297 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_DIS_NULL_PKT); in HAL_TSP_HwPatch()
300 … REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_PVR_WRITE_POINTER_TO_NEXT_ADDRESS_EN); in HAL_TSP_HwPatch()
303 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_SKIP_PVR_RUSH_DATA); in HAL_TSP_HwPatch()
3356 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Init() local
3359 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_PINGPONG_EN); in HAL_PVR_Init()
3360 …REG16_MSK_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_10, CFG_PVR_10_REG_INPUT_SRC_MASK, (((MS_U16)pktDmxId) <… in HAL_PVR_Init()
3371 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Exit() local
3375 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_PINGPONG_EN); in HAL_PVR_Exit()
3376 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_10, CFG_PVR_10_REG_INPUT_SRC_MASK); in HAL_PVR_Exit()
3379 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_RST_WADR); in HAL_PVR_Exit()
3380 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_RST_WADR); in HAL_PVR_Exit()
3394 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Start() local
3398 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_RST_WADR); in HAL_PVR_Start()
3399 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_RST_WADR); in HAL_PVR_Start()
3402 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_EN); in HAL_PVR_Start()
3413 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Stop() local
3417 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_EN); in HAL_PVR_Stop()
3428 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Pause() local
3433 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_PAUSE); in HAL_PVR_Pause()
3437 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_STR2MI_PAUSE); in HAL_PVR_Pause()
3449 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_RecPid() local
3454 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_RECORD_ALL); in HAL_PVR_RecPid()
3458 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_RECORD_ALL); in HAL_PVR_RecPid()
3472 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Alignment_Enable() local
3477 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_ALIGN_EN); in HAL_PVR_Alignment_Enable()
3481 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_ALIGN_EN); in HAL_PVR_Alignment_Enable()
3493 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_FlushData() local
3496 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_FLUSH_PVR_DATA); in HAL_PVR_FlushData()
3497 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_FLUSH_PVR_DATA); in HAL_PVR_FlushData()
3508 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Skip_Scrmb() local
3513 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_MASK_SCR_PVR_EN); in HAL_PVR_Skip_Scrmb()
3517 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_MASK_SCR_PVR_EN); in HAL_PVR_Skip_Scrmb()
3529 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_Block_Dis() local
3534 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_PVR_BLOCK_DISABLE); in HAL_PVR_Block_Dis()
3538 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_PVR_BLOCK_DISABLE); in HAL_PVR_Block_Dis()
3550 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_BurstLen() local
3553 …REG16_MSK_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_BURST_LEN_MASK, (u16BurstMode << … in HAL_PVR_BurstLen()
3574 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_TimeStamp_Sel() local
3579 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_PVR_TIMESTAMP_SRC_SEL); in HAL_PVR_TimeStamp_Sel()
3583 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_PVR_TIMESTAMP_SRC_SEL); in HAL_PVR_TimeStamp_Sel()
3600 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_PauseTime_En() local
3607 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_26, CFG_PVR_26_REG_BYPASS_TIMESTAMP_SEL); in HAL_PVR_PauseTime_En()
3611 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_26, CFG_PVR_26_REG_BYPASS_TIMESTAMP_SEL); in HAL_PVR_PauseTime_En()
3623 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetPauseTime() local
3626 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_22_23, u32PauseTime); in HAL_PVR_SetPauseTime()
3637 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_RecNull() local
3642 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_DIS_NULL_PKT); in HAL_PVR_RecNull()
3646 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_20, CFG_PVR_20_REG_DIS_NULL_PKT); in HAL_PVR_RecNull()
3658 … REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetBuf() local
3665 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_01_02, (u32StartAddr0 >> MIU_BUS)); in HAL_PVR_SetBuf()
3667 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_05_06, (u32EndAddr0 >> MIU_BUS)); in HAL_PVR_SetBuf()
3669 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_03_04, (u32StartAddr0 >> MIU_BUS)); in HAL_PVR_SetBuf()
3672 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_07_08, (u32StartAddr1 >> MIU_BUS)); in HAL_PVR_SetBuf()
3674 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_0B_0C, (u32EndAddr1 >> MIU_BUS)); in HAL_PVR_SetBuf()
3676 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_09_0A, (u32StartAddr1 >> MIU_BUS)); in HAL_PVR_SetBuf()
3700 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetStr2Miu_StartAddr() local
3704 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_01_02, (phyMiuOffsetPvrBuf0 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_StartAddr()
3706 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_07_08, (phyMiuOffsetPvrBuf1 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_StartAddr()
3729 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetStr2Miu_MidAddr() local
3733 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_03_04, (phyMiuOffsetPvrBuf0 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_MidAddr()
3735 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_09_0A, (phyMiuOffsetPvrBuf1 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_MidAddr()
3758 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetStr2Miu_EndAddr() local
3762 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_05_06, (u32EndAddr0 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_EndAddr()
3764 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_0B_0C, (u32EndAddr1 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_EndAddr()
3775 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_GetWritePtr() local
3778 return (REG32_R(&RegPvrCtrl[u8PvrEng].CFG_PVR_13_14) << MIU_BUS); in HAL_PVR_GetWritePtr()
3790 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32EngDst < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_GetEngSrc() local
3793 …*eSrc = (REG16_R(&RegPvrCtrl[u8PvrEng].CFG_PVR_10) & CFG_PVR_10_REG_INPUT_SRC_MASK) >> CFG_PVR_10_… in HAL_PVR_GetEngSrc()
4082 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetStrPacketMode() local
4087 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_PKT192_EN); in HAL_PVR_SetStrPacketMode()
4091 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_PKT192_EN); in HAL_PVR_SetStrPacketMode()
4105 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_GetPVRTimeStamp() local
4108 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
4109 u32lpcr = REG32_R(&RegPvrCtrl[u8PvrEng].CFG_PVR_17_18); in HAL_PVR_GetPVRTimeStamp()
4110 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
4123 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_PVR_SetPVRTimeStamp() local
4127 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_LPCR1_WLD); in HAL_PVR_SetPVRTimeStamp()
4128 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_15_16, u32Stamp); in HAL_PVR_SetPVRTimeStamp()
4129 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_LPCR1_WLD); in HAL_PVR_SetPVRTimeStamp()
4785 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_TSP_PVR_Address_Protect_En() local
4790 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_PVR_DMAW_PROTECT_EN); in HAL_TSP_PVR_Address_Protect_En()
4794 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_0D, CFG_PVR_0D_REG_PVR_DMAW_PROTECT_EN); in HAL_TSP_PVR_Address_Protect_En()
4812 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32PVREng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_TSP_PVR_Address_Protect() local
4820 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_1C_1D, u32LBnd); in HAL_TSP_PVR_Address_Protect()
4821 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_1E_1F, u32UBnd); in HAL_TSP_PVR_Address_Protect()
4924 REG_PVR_ENG_Ctrl *RegPvrCtrl = (u32Eng < E_TSP_PVR_PVRENG_8)? _RegPvrCtrl : _RegPvrCtrl_1; in HAL_TSP_CAPVR_SPSEnable() local
4931 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_10, CFG_PVR_10_REG_REC_CA_UPPER_PATH); in HAL_TSP_CAPVR_SPSEnable()
4934 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_1B, CFG_PVR_1B_REG_PKT_192_SPS_EN); in HAL_TSP_CAPVR_SPSEnable()
4938 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_10, CFG_PVR_10_REG_REC_CA_UPPER_PATH); in HAL_TSP_CAPVR_SPSEnable()
4939 REG16_CLR(&RegPvrCtrl[u8PvrEng].CFG_PVR_1B, CFG_PVR_1B_REG_PKT_192_SPS_EN); in HAL_TSP_CAPVR_SPSEnable()
4956 REG_PVR_ENG_Ctrl *RegPvrCtrl = NULL; in HAL_TSP_PVR_SPSConfig() local
4963 RegPvrCtrl = _RegPvrCtrl; in HAL_TSP_PVR_SPSConfig()
4969 RegPvrCtrl = _RegPvrCtrl_1; in HAL_TSP_PVR_SPSConfig()
4973 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_1B, CFG_PVR_1B_REG_PKT_192_SPS_EN); in HAL_TSP_PVR_SPSConfig()
4983 REG16_SET(&RegPvrCtrl[u8PvrEng].CFG_PVR_1B, CFG_PVR_1B_REG_LOAD_SPS_KEY); in HAL_TSP_PVR_SPSConfig()