124 #define REG16_MSK_W(reg, mask, value)    REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value)…  macro
668     REG16_MSK_W(&_RegTopCtrl->CFG_TOP_08, CFG_TOP_08_REG_MIU_SEL_FILEIN_MASK, u8MiuSel); //Filein #0  in HAL_TSP_LoadFW()
674     REG16_MSK_W(&_RegCtrl->Dnld_AddrH, TSP_DMA_RADDR_MSB_MASK, (MS_U16)u32DnldCtrl1);  in HAL_TSP_LoadFW()
863 …REG16_MSK_W(&_RegTspSrcCtrl->CFG_TSP_SRC_00_03[(tsIf >> 1)], CFG_TSP_SRC_MUX_ODD_MASK, (pad_src <<…  in HAL_TSP_TSIF_SelPad()
867 …REG16_MSK_W(&_RegTspSrcCtrl->CFG_TSP_SRC_00_03[(tsIf >> 1)], CFG_TSP_SRC_MUX_EVEN_MASK, (pad_src <…  in HAL_TSP_TSIF_SelPad()
1290 …REG16_MSK_W(&RegFileCtrl[u8FileEng].CFG_FILE_0A, CFG_FILE_0A_REG_INIT_TRUST_SYNC_CNT_VALUE_MASK, u…  in HAL_TSP_Filein_PktSize()
1291 …REG16_MSK_W(&RegFileCtrl[u8FileEng].CFG_FILE_08, CFG_FILE_08_REG_CHK_PKT_SIZE_MASK, (u16PktLen-1) …  in HAL_TSP_Filein_PktSize()
1311 …REG16_MSK_W(&_RegTopCtrl->CFG_TOP_08, (CFG_TOP_08_REG_MIU_SEL_FILEIN_MASK << u8Shift), (u8MiuSel <…  in HAL_TSP_Filein_Addr()
1843      REG16_MSK_W(&_RegCtrl->Hw_Config4, TSP_HW_DMA_MODE_MASK, (burstMode << TSP_HW_DMA_MODE_SHIFT));  in HAL_TSP_SecFlt_BurstLen()
2005 …REG16_MSK_W(&_RegTopCtrl->CFG_TOP_09, CFG_TOP_09_REG_MIU_SEL_SEC_MASK, (u8MiuSel << CFG_TOP_09_REG…  in HAL_TSP_SecBuf_SetBuf()
2124 …REG16_MSK_W(&_RegPcrCtrl[pcrFltId].CFG_PCR_00, CFG_PCR_00_REG_PCR_SRC_MASK, src << CFG_PCR_00_REG_…  in HAL_TSP_PcrFlt_SetSrc()
2613 …REG16_MSK_W(&_RegAudioCtrl[u8AudioFltIdx].CFG_AV_02, CFG_AV_02_REG_INPUT_SRC_MASK, ((MS_U16)pktDmx…  in HAL_TSP_FIFO_SetSrc()
2619 …REG16_MSK_W(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_02, CFG_AV_02_REG_INPUT_SRC_MASK, ((MS_U16)pktDmx…  in HAL_TSP_FIFO_SetSrc()
2969 …REG16_MSK_W(&_RegAudioCtrl[u8AudioFltIdx].CFG_AV_01, CFG_AV_01_REG_PS_MODE_SRC_MASK, ((eFileEng + …  in HAL_TSP_FIFO_Bypass_Src()
2975 …REG16_MSK_W(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_01, CFG_AV_01_REG_PS_MODE_SRC_MASK, ((eFileEng + …  in HAL_TSP_FIFO_Bypass_Src()
3212 …REG16_MSK_W(&_RegOtherCtrl->CFG_OTHER_70, CFG_OTHER_70_REG_VQ_WR_THRESHOLD_MASK, (0x8 << CFG_OTHER…  in _HAL_TSP_VQ_TxConfig()
3213 …REG16_MSK_W(&_RegOtherCtrl->CFG_OTHER_70, CFG_OTHER_70_REG_VQ_FORCEFIRE_CNT_1K_MASK, (0xC << CFG_O…  in _HAL_TSP_VQ_TxConfig()
3229 …REG16_MSK_W(&_RegTopCtrl->CFG_TOP_09, CFG_TOP_09_REG_MIU_SEL_VQ_MASK, (u8MiuSel << CFG_TOP_09_REG_…  in HAL_TSP_SetVQ()
3360 …REG16_MSK_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_10, CFG_PVR_10_REG_INPUT_SRC_MASK, (((MS_U16)pktDmxId) <…  in HAL_PVR_Init()
3553 …REG16_MSK_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_00, CFG_PVR_00_REG_PVR_BURST_LEN_MASK, (u16BurstMode << …  in HAL_PVR_BurstLen()
4475 …REG16_MSK_W(&_RegOtherCtrl->CFG_OTHER_1F, CFG_OTHER_1F_REG_SRC_AES_FILEIN_KEY_MASK, (tsIf << CFG_O…  in HAL_TSP_FileIn_SPDConfig()
4974 …REG16_MSK_W(&_RegOtherCtrl->CFG_OTHER_1F, CFG_OTHER_1F_REG_SRC_AES_PVR_KEY_MASK, ((MS_U16)u32PVREn…  in HAL_TSP_PVR_SPSConfig()
5061         REG16_MSK_W(&_RegCtrl->PVRConfig,TSP_MATCH_PID_SEL_MASK, u16WordId);  in HAL_DSCMB_GetStatus()
5099         REG16_MSK_W(SynCReg, u16Mask, (*pu8SyncByte << u16Shift));  in HAL_TSP_PktConverter_SetSyncByte()
5125         REG16_MSK_W(SrcIdReg, u16Mask, (*pu8SrcId << u16Shift));  in HAL_TSP_PktConverter_SetSrcId()
5145 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_MXL_PKT_HEADER_MASK, (u8PktHeaderLen << CFG_PATH_05_MXL_P…  in HAL_TSP_PktConverter_SetMXLPktHeaderLen()
5157 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_SYNC_BYTE_POSITION_MASK, (u8SyncBytePos << CFG_PATH_05_SY…  in HAL_TSP_PktConverter_SetSyncBytePosition()
5173 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_NORMAL…  in HAL_TSP_PktConverter_PktMode()
5176 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_CIPLUS…  in HAL_TSP_PktConverter_PktMode()
5179 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_OPENCA…  in HAL_TSP_PktConverter_PktMode()
5182 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_ATS_MO…  in HAL_TSP_PktConverter_PktMode()
5185 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_MXL_MO…  in HAL_TSP_PktConverter_PktMode()
5189 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_MXL_MO…  in HAL_TSP_PktConverter_PktMode()
5193 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_MXL_MO…  in HAL_TSP_PktConverter_PktMode()
5197 …REG16_MSK_W(PktConverterReg, CFG_PATH_05_PKT_CONVERTER_MODE_MASK, CFG_PATH_05_PKT_CONVERTER_ND_MOD…  in HAL_TSP_PktConverter_PktMode()
5731 …REG16_MSK_W(&_RegPathCtrl[u32FQEng].CFG_PATH_09, CFG_PATH_09_REG_FIQ_MUX_OUT_PATH_SRC_MASK, ((MS_U…  in HAL_TSP_FQ_MuxOutPathSrc()
6177 …REG16_MSK_W(&_RegTopCtrl->CFG_TOP_09, (CFG_TOP_09_REG_MIU_SEL_MMFI_MASK << u8Shift), (u8MiuSel << …  in HAL_TSP_FQ_MMFI_MIU_Sel()
6183 …REG16_MSK_W(&_RegTopCtrl->CFG_TOP_07, (CFG_TOP_07_REG_MIU_SEL_FIQ_MASK << u8Shift), (u8MiuSel << (…  in HAL_TSP_FQ_MMFI_MIU_Sel()
6188 …REG16_MSK_W(&_RegTopCtrl->CFG_TOP_09, (CFG_TOP_09_REG_MIU_SEL_FIQ_MUX_MASK << u8Shift), (u8MiuSel …  in HAL_TSP_FQ_MMFI_MIU_Sel()