Lines Matching refs:u16Clk
301 MS_BOOL HAL_TSO_3WirePadMapping(MS_U8 u8Pad3WireId, MS_U16 *u16Pad, MS_U16 *u16Clk) in HAL_TSO_3WirePadMapping() argument
307 *u16Clk = TSO_CLKIN_TS3; in HAL_TSO_3WirePadMapping()
311 *u16Clk = TSO_CLKIN_TS4; in HAL_TSO_3WirePadMapping()
315 *u16Clk = TSO_CLKIN_TS5; in HAL_TSO_3WirePadMapping()
319 *u16Clk = TSO_CLKIN_TS6; in HAL_TSO_3WirePadMapping()
797 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk() local
803 u16Clk |= REG_CLKGEN0_TSO_OUT_CLK_DISABLE; in HAL_TSO_OutClk()
812 u16Clk |= (*pu16ClkOutSel << REG_CLKGEN0_TSO_OUT_CLK_SRC_SHIFT); in HAL_TSO_OutClk()
816 u16Clk |= REG_CLKGEN0_TSO_OUT_CLK_INVERT; in HAL_TSO_OutClk()
819 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) = u16Clk; in HAL_TSO_OutClk()
875 *pbEnable = ((u16Clk & REG_CLKGEN0_TSO_OUT_CLK_DISABLE) == 0); in HAL_TSO_OutClk()
876 … *pbClkInvert = ((u16Clk & REG_CLKGEN0_TSO_OUT_CLK_INVERT) == REG_CLKGEN0_TSO_OUT_CLK_INVERT); in HAL_TSO_OutClk()
877 *pu16ClkOutSel = u16Clk >> REG_CLKGEN0_TSO_OUT_CLK_SRC_SHIFT; in HAL_TSO_OutClk()