Lines Matching refs:_u32RegBase
112 static MS_VIRT _u32RegBase = 0; variable
170 _u32RegBase = u32BankAddr; in HAL_OTV_SetBank()
172 _OTVReg[0] = (REG_OTV*)(_u32RegBase + OTV0_REG_CTRL_BASE); in HAL_OTV_SetBank()
173 _u32OTV_PidfltBase[0] = _u32RegBase + OTV0_PIDFLT_BASE; in HAL_OTV_SetBank()
174 _u32OTV_EventMaskBase[0] = _u32RegBase + OTV0_EVENT_MASK_BASE; in HAL_OTV_SetBank()
177 _OTVReg[1] = (REG_OTV*)(_u32RegBase + OTV1_REG_CTRL_BASE); in HAL_OTV_SetBank()
178 _u32OTV_PidfltBase[1] = _u32RegBase + OTV1_PIDFLT_BASE; in HAL_OTV_SetBank()
179 _u32OTV_EventMaskBase[1] = _u32RegBase + OTV1_EVENT_MASK_BASE; in HAL_OTV_SetBank()
182 _OTVReg[2] = (REG_OTV*)(_u32RegBase + OTV2_REG_CTRL_BASE); in HAL_OTV_SetBank()
183 _u32OTV_PidfltBase[2] = _u32RegBase + OTV2_PIDFLT_BASE; in HAL_OTV_SetBank()
184 _u32OTV_EventMaskBase[2] = _u32RegBase + OTV2_EVENT_MASK_BASE; in HAL_OTV_SetBank()
186 _OTVReg[3] = (REG_OTV*)(_u32RegBase + OTV3_REG_CTRL_BASE); in HAL_OTV_SetBank()
187 _u32OTV_PidfltBase[3] = _u32RegBase + OTV3_PIDFLT_BASE; in HAL_OTV_SetBank()
188 _u32OTV_EventMaskBase[3] = _u32RegBase + OTV3_EVENT_MASK_BASE; in HAL_OTV_SetBank()