Lines Matching refs:CFG_01
1666 …REG16_SET(&_RegCtrl2->CFG_01, CFG_01_TSP_FILE_SEGMENT1); // for wishbone DMA (load firm… in HAL_TSP_TSIF_FileEn()
1668 REG16_SET(&_RegCtrl2->CFG_01, CFG_01_TS_DATA_PORT_SEL1); in HAL_TSP_TSIF_FileEn()
1697 REG16_CLR(&_RegCtrl2->CFG_01, CFG_01_TSP_FILE_SEGMENT1); in HAL_TSP_TSIF_FileEn()
1699 REG16_CLR(&_RegCtrl2->CFG_01, CFG_01_TS_DATA_PORT_SEL1); in HAL_TSP_TSIF_FileEn()
2024 REG16_MSK_W(&_RegCtrl2->CFG_01, CFG_01_PDFLT2_FILE_SRC, u16Src); in HAL_TSP_ReDirect_File()
2780 REG16_SET(&_RegCtrl2->CFG_01, CFG_01_TIMER_EN1); in HAL_TSP_Filein_ByteDelay()
2803 REG16_CLR(&_RegCtrl2->CFG_01, CFG_01_TIMER_EN1); in HAL_TSP_Filein_ByteDelay()
2927 REG16_SET(&_RegCtrl2->CFG_01, CFG_01_PKT192_EN1); in HAL_TSP_Filein_PacketMode()
2947 REG16_CLR(&_RegCtrl2->CFG_01, CFG_01_PKT192_EN1); in HAL_TSP_Filein_PacketMode()
2972 REG16_CLR(&_RegCtrl2->CFG_01, CFG_01_PKT192_BLK_DISABLE1); in HAL_TSP_Filein_BlockTimeStamp()
2991 REG16_SET(&_RegCtrl2->CFG_01, CFG_01_PKT192_BLK_DISABLE1); in HAL_TSP_Filein_BlockTimeStamp()
3046 REG16_SET(&_RegCtrl2->CFG_01, CFG_01_LPCR2_WLD1); in HAL_TSP_Filein_SetTimeStamp()
3048 REG16_CLR(&_RegCtrl2->CFG_01, CFG_01_LPCR2_WLD1); in HAL_TSP_Filein_SetTimeStamp()
3729 REG16_MSK_W(&_RegCtrl2->CFG_01, CFG_01_PCR0_SRC_MASK, src << CFG_01_PCR0_SRC_SHIFT); in HAL_TSP_PcrFlt_SetSrc()
3733 REG16_MSK_W(&_RegCtrl2->CFG_01, CFG_01_PCR1_SRC_MASK, src << CFG_01_PCR1_SRC_SHIFT); in HAL_TSP_PcrFlt_SetSrc()
3776 … *pPcrSrc = (REG16_R(&_RegCtrl2->CFG_01) & CFG_01_PCR0_SRC_MASK) >> CFG_01_PCR0_SRC_SHIFT; in HAL_TSP_PcrFlt_GetSrc()
3780 … *pPcrSrc = (REG16_R(&_RegCtrl2->CFG_01) & CFG_01_PCR1_SRC_MASK) >> CFG_01_PCR1_SRC_SHIFT; in HAL_TSP_PcrFlt_GetSrc()