Lines Matching refs:_TSOCtrl1
46 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL; variable
227 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_u32TSORegBase+ REG_CTRL_BASE_TSO1); // 0x1612 in HAL_TSO_SetBank()
246 …_REG16_SET(&(_TSOCtrl1->REG_TSO_MIU_ABT_CONFIG_1), REG_MIU_ABT_CONFIG_1_CHECK2MI_RDY | REG_MIU_ABT… in HAL_TSO_Init()
1003 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_Set_Filein_ReadAddr()
1008 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_2, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_2) & (~REG_M… in HAL_TSO_Set_Filein_ReadAddr()
1831 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1837 Base = &(_TSOCtrl1->SVQ1_BASE); in HAL_TSO_SVQBuf_Set()
1838 Size = &(_TSOCtrl1->SVQ1_SIZE_200BYTE); in HAL_TSO_SVQBuf_Set()
1839 TX_Config = &(_TSOCtrl1->SVQ1_TX_CONFIG); in HAL_TSO_SVQBuf_Set()
1840 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1843 Base = &(_TSOCtrl1->SVQ2_BASE); in HAL_TSO_SVQBuf_Set()
1844 Size = &(_TSOCtrl1->SVQ2_SIZE_200BYTE); in HAL_TSO_SVQBuf_Set()
1845 TX_Config = &(_TSOCtrl1->SVQ2_TX_CONFIG); in HAL_TSO_SVQBuf_Set()
1846 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1849 Base = &(_TSOCtrl1->SVQ3_BASE); in HAL_TSO_SVQBuf_Set()
1850 Size = &(_TSOCtrl1->SVQ3_SIZE_200BYTE); in HAL_TSO_SVQBuf_Set()
1851 TX_Config = &(_TSOCtrl1->SVQ3_TX_CONFIG); in HAL_TSO_SVQBuf_Set()
1852 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1855 Base = &(_TSOCtrl1->SVQ4_BASE); in HAL_TSO_SVQBuf_Set()
1856 Size = &(_TSOCtrl1->SVQ4_SIZE_200BYTE); in HAL_TSO_SVQBuf_Set()
1857 TX_Config = &(_TSOCtrl1->SVQ4_TX_CONFIG); in HAL_TSO_SVQBuf_Set()
1858 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1861 Base = &(_TSOCtrl1->SVQ5_BASE); in HAL_TSO_SVQBuf_Set()
1862 Size = &(_TSOCtrl1->SVQ5_SIZE_200BYTE); in HAL_TSO_SVQBuf_Set()
1863 TX_Config = &(_TSOCtrl1->SVQ5_TX_CONFIG); in HAL_TSO_SVQBuf_Set()
1864 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1867 Base = &(_TSOCtrl1->SVQ6_BASE); in HAL_TSO_SVQBuf_Set()
1868 Size = &(_TSOCtrl1->SVQ6_SIZE_200BYTE); in HAL_TSO_SVQBuf_Set()
1869 TX_Config = &(_TSOCtrl1->SVQ6_TX_CONFIG); in HAL_TSO_SVQBuf_Set()
1870 …_HAL_REG16_W(&_TSOCtrl1->REG_TSO_MIU_SEL_1, (_HAL_REG16_R(&_TSOCtrl1->REG_TSO_MIU_SEL_1) & (~REG_M… in HAL_TSO_SVQBuf_Set()
1898 p16Reg = &(_TSOCtrl1->SVQ1_TX_CONFIG); in HAL_TSO_SVQ_TX_Reset()
1901 p16Reg = &(_TSOCtrl1->SVQ2_TX_CONFIG); in HAL_TSO_SVQ_TX_Reset()
1904 p16Reg = &(_TSOCtrl1->SVQ3_TX_CONFIG); in HAL_TSO_SVQ_TX_Reset()
1907 p16Reg = &(_TSOCtrl1->SVQ4_TX_CONFIG); in HAL_TSO_SVQ_TX_Reset()
1910 p16Reg = &(_TSOCtrl1->SVQ5_TX_CONFIG); in HAL_TSO_SVQ_TX_Reset()
1913 p16Reg = &(_TSOCtrl1->SVQ6_TX_CONFIG); in HAL_TSO_SVQ_TX_Reset()
1927 MS_U16 u16data = _HAL_REG16_R(&(_TSOCtrl1->SVQ_RX_CONFIG)); in HAL_TSO1_SVQ_Rx_Enable()
1938 _HAL_REG16_W(&(_TSOCtrl1->SVQ_RX_CONFIG), u16data); in HAL_TSO1_SVQ_Rx_Enable()
1943 …_HAL_REG16_W(&(_TSOCtrl1->SVQ_RX_CONFIG), (_HAL_REG16_R(&(_TSOCtrl1->SVQ_RX_CONFIG)) & ~TSO1_SVQ_R… in HAL_TSO_Set_SVQRX_PktMode()
1954 u32data = _HAL_REG32_R(&(_TSOCtrl1->SVQ_STATUS)); in HAL_TSO_Get_SVQ_Status()
2004 p16Reg = &(_TSOCtrl1->REG_PRE_HEADER_1_CONFIG_0); in HAL_TSO_LocalStreamID()
2007 p16Reg = &(_TSOCtrl1->REG_PRE_HEADER_2_CONFIG_0); in HAL_TSO_LocalStreamID()
2010 p16Reg = &(_TSOCtrl1->REG_PRE_HEADER_3_CONFIG_0); in HAL_TSO_LocalStreamID()
2013 p16Reg = &(_TSOCtrl1->REG_PRE_HEADER_4_CONFIG_0); in HAL_TSO_LocalStreamID()
2016 p16Reg = &(_TSOCtrl1->REG_PRE_HEADER_5_CONFIG_0); in HAL_TSO_LocalStreamID()
2019 p16Reg = &(_TSOCtrl1->REG_PRE_HEADER_6_CONFIG_0); in HAL_TSO_LocalStreamID()