243     _REG16_SET(&(_TSOCtrl->TSO_CONFIG5), TSO_CONFIG5_FIXED_MIU_REG_FLUSH);  in HAL_TSO_Init()
1735                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_1);  in HAL_TSO_Livein_3Wire()
1738                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_2);  in HAL_TSO_Livein_3Wire()
1741                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_3);  in HAL_TSO_Livein_3Wire()
1744                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_4);  in HAL_TSO_Livein_3Wire()
1747                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_5);  in HAL_TSO_Livein_3Wire()
1750                 _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_6);  in HAL_TSO_Livein_3Wire()
1762                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_1);  in HAL_TSO_Livein_3Wire()
1765                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_2);  in HAL_TSO_Livein_3Wire()
1768                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_3);  in HAL_TSO_Livein_3Wire()
1771                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_4);  in HAL_TSO_Livein_3Wire()
1774                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_5);  in HAL_TSO_Livein_3Wire()
1777                 _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_3_WIRE_EN_6);  in HAL_TSO_Livein_3Wire()
1791         _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_TSIO_MODE);  in HAL_TSO_TsioMode_En()
1795         _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_TSIO_MODE);  in HAL_TSO_TsioMode_En()
1803         _REG16_SET(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_TSIO2OPIF);  in HAL_TSO_Tsio2Opif_En()
1807         _REG16_CLR(&(_TSOCtrl->TSO_CONFIG5),TSO_CONFIG5_TSIO2OPIF);  in HAL_TSO_Tsio2Opif_En()