Lines Matching refs:TSO_CLKGEN0_REG

101 #define TSO_CLKGEN0_REG(addr)       (*((volatile MS_U16*)(_u32TSORegBase + 0x1600UL + ((addr)<<2))))  macro
424 u16data = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()
498 u16value = TSO_CLKGEN0_REG(u16Reg) & ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_Set_InClk()
523 TSO_CLKGEN0_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()
681 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) = in HAL_TSO_TSOOutDiv()
682 …(TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) & ~REG_CLKGEN0_TSO_OUT_DIV_SEL_MASK) | (*pu16ClkOutDiv… in HAL_TSO_TSOOutDiv()
684 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_DIVNUM) = in HAL_TSO_TSOOutDiv()
685 …(TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_DIVNUM) & ~REG_CLKGEN0_TSO_OUT_DIVNUM_MASK) | (*pu16ClkOutDiv… in HAL_TSO_TSOOutDiv()
689 …*pu16ClkOutDivSrcSel = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) & REG_CLKGEN0_TSO_OUT_DIV_SEL_MA… in HAL_TSO_TSOOutDiv()
690 …*pu16ClkOutDivNum = (TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_DIVNUM) & REG_CLKGEN0_TSO_OUT_DIVNUM_MASK… in HAL_TSO_TSOOutDiv()
705 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_DIVNUM) = in HAL_TSO_PreTsoOutClk()
706 …(TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_DIVNUM) & ~REG_CLKGEN_TSO_P_TSO_OUT_MASK) | ((*pu16PreTsoOutS… in HAL_TSO_PreTsoOutClk()
710 …*pu16PreTsoOutSel = (TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_DIVNUM) & REG_CLKGEN_TSO_P_TSO_OUT_MASK) … in HAL_TSO_PreTsoOutClk()
770 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) &= ~REG_CLKGEN0_TSO_OUT_PHASE_TUN_ENABLE; in HAL_TSO_Set_TSOOut_Phase_Tune()
774 … u16value = (TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) & ~REG_CLKGEN0_TSO_OUT_PH_TUN_NUM_MASK) in HAL_TSO_Set_TSOOut_Phase_Tune()
777 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) = u16value; in HAL_TSO_Set_TSOOut_Phase_Tune()
778 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_PHASE) |= REG_CLKGEN0_TSO_OUT_PHASE_TUN_ENABLE; in HAL_TSO_Set_TSOOut_Phase_Tune()
791 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
813 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) = u16Clk; in HAL_TSO_OutClk()
2154 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
2155 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()
2170 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) |= REG_CLKGEN0_TSO_OUT_CLK_DISABLE; in HAL_TSO_PowerCtrl()
2171 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()