605     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_SelPad()  local
617             u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT;  in HAL_TSO_SelPad()
622             u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT;  in HAL_TSO_SelPad()
627             u16RegShift = REG_TSP5_TSOIN2_MUX_SHIFT;  in HAL_TSO_SelPad()
632             u16RegShift = REG_TSP5_MMT_MUX_SHIFT;  in HAL_TSO_SelPad()
714 …uxReg) = (TSP_TSP5_REG(u16MuxReg) & ~(u16MuxRegMask << u16RegShift)) | (u16InPadSel << u16RegShift…  in HAL_TSO_SelPad()
723 …uxReg) = (TSP_TSP5_REG(u16MuxReg) & ~(u16MuxRegMask << u16RegShift)) | (u16InPadSel << u16RegShift…  in HAL_TSO_SelPad()
730     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_Set_InClk()  local
741             u16RegShift = REG_CLKGEN0_TSO_IN_SHIFT;  in HAL_TSO_Set_InClk()
747             u16RegShift = REG_CLKGEN2_TSO1_IN_SHIFT;  in HAL_TSO_Set_InClk()
753             u16RegShift = REG_CLKGEN2_TSO2_IN_SHIFT;  in HAL_TSO_Set_InClk()
759             u16RegShift = REG_CLKGEN2_MMT_IN_SHIFT;  in HAL_TSO_Set_InClk()
771         u16value |= ((REG_CLKGEN2_TSO1_IN_DISABLE << u16RegShift) & 0xFFFFUL);  in HAL_TSO_Set_InClk()
780         u16value |= (u16ClkSel << u16RegShift);  in HAL_TSO_Set_InClk()
783             u16value |= ((REG_CLKGEN2_TSO1_IN_INVERT << u16RegShift) & 0xFFFFUL);  in HAL_TSO_Set_InClk()
806     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_GetInputTSIF_Status()  local
816             u16RegShift = REG_TSP5_TSOIN0_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
821             u16RegShift = REG_TSP5_TSOIN1_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
826             u16RegShift = REG_TSP5_TSOIN2_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
831             u16RegShift = REG_TSP5_MMT_MUX_SHIFT;  in HAL_TSO_GetInputTSIF_Status()
837     *pu16Pad = (TSP_TSP5_REG(u16Reg) & (u16RegMask << u16RegShift)) >> u16RegShift;  in HAL_TSO_GetInputTSIF_Status()