605     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_SelPad()  local
643             u16RegMask = REG_TOP_TS0_CONFIG_MASK;  in HAL_TSO_SelPad()
655             u16RegMask = REG_TOP_TS1_CONFIG_MASK;  in HAL_TSO_SelPad()
667             u16RegMask = REG_TOP_TS2_CONFIG_MASK;  in HAL_TSO_SelPad()
679             u16RegMask = REG_TOP_TS3_CONFIG_MASK;  in HAL_TSO_SelPad()
691             u16RegMask = REG_TOP_TS4_CFG_MASK;  in HAL_TSO_SelPad()
703             u16RegMask = REG_TOP_TS5_CFG_MASK;  in HAL_TSO_SelPad()
721     TSP_TOP_REG(u16Reg) = (TSP_TOP_REG(u16Reg) & ~u16RegMask) | u16data;  in HAL_TSO_SelPad()
730     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_Set_InClk()  local
740             u16RegMask = REG_CLKGEN0_TSO_IN_MASK;  in HAL_TSO_Set_InClk()
742             u16value = TSO_CLKGEN0_REG(u16Reg) & ~u16RegMask;  in HAL_TSO_Set_InClk()
746             u16RegMask = REG_CLKGEN2_TSO1_IN_MASK;  in HAL_TSO_Set_InClk()
748             u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask;  in HAL_TSO_Set_InClk()
752             u16RegMask = REG_CLKGEN2_TSO2_IN_MASK;  in HAL_TSO_Set_InClk()
754             u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask;  in HAL_TSO_Set_InClk()
758             u16RegMask = REG_CLKGEN2_MMT_IN_MASK;  in HAL_TSO_Set_InClk()
760             u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask;  in HAL_TSO_Set_InClk()
806     MS_U16 u16Reg, u16RegMask, u16RegShift;  in HAL_TSO_GetInputTSIF_Status()  local
815             u16RegMask = REG_TSP5_TSOIN_MUX_MASK;  in HAL_TSO_GetInputTSIF_Status()
820             u16RegMask = REG_TSP5_TSOIN_MUX_MASK;  in HAL_TSO_GetInputTSIF_Status()
825             u16RegMask = REG_TSP5_TSOIN_MUX_MASK;  in HAL_TSO_GetInputTSIF_Status()
830             u16RegMask = REG_TSP5_MMT_MUX_MASK;  in HAL_TSO_GetInputTSIF_Status()
837     *pu16Pad = (TSP_TSP5_REG(u16Reg) & (u16RegMask << u16RegShift)) >> u16RegShift;  in HAL_TSO_GetInputTSIF_Status()