152 #define TSO0_REG(addr)              (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…  macro
2068     _u16TSORegArray[0][0x04] = TSO0_REG(0x04);  in HAL_TSO_SaveRegs()
2069     _u16TSORegArray[0][0x05] = TSO0_REG(0x05);  in HAL_TSO_SaveRegs()
2070     _u16TSORegArray[0][0x06] = TSO0_REG(0x06);  in HAL_TSO_SaveRegs()
2072     _u16TSORegArray[0][0x14] = TSO0_REG(0x14);  in HAL_TSO_SaveRegs()
2073     _u16TSORegArray[0][0x15] = TSO0_REG(0x15);  in HAL_TSO_SaveRegs()
2074     _u16TSORegArray[0][0x16] = TSO0_REG(0x16);  in HAL_TSO_SaveRegs()
2076     _u16TSORegArray[0][0x18] = TSO0_REG(0x18);  in HAL_TSO_SaveRegs()
2077     _u16TSORegArray[0][0x19] = TSO0_REG(0x19);  in HAL_TSO_SaveRegs()
2078     _u16TSORegArray[0][0x1a] = TSO0_REG(0x1a);  in HAL_TSO_SaveRegs()
2082         _u16TSORegArray[0][u32ii] = TSO0_REG(u32ii);  in HAL_TSO_SaveRegs()
2085     _u16TSORegArray[0][0x4c] = TSO0_REG(0x4c);  in HAL_TSO_SaveRegs()
2086     _u16TSORegArray[0][0x4d] = TSO0_REG(0x4d);  in HAL_TSO_SaveRegs()
2090         _u16TSORegArray[0][u32ii] = TSO0_REG(u32ii);  in HAL_TSO_SaveRegs()
2093     _u16TSORegArray[0][0x79] = TSO0_REG(0x79);  in HAL_TSO_SaveRegs()
2094     _u16TSORegArray[0][0x7a] = TSO0_REG(0x7a);  in HAL_TSO_SaveRegs()
2095     _u16TSORegArray[0][0x7b] = TSO0_REG(0x7b);  in HAL_TSO_SaveRegs()
2096     _u16TSORegArray[0][0x7c] = TSO0_REG(0x7c);  in HAL_TSO_SaveRegs()
2157     TSO0_REG(0x04) = _u16TSORegArray[0][0x04];  in HAL_TSO_RestoreRegs()
2158     TSO0_REG(0x05) = _u16TSORegArray[0][0x05];  in HAL_TSO_RestoreRegs()
2159     TSO0_REG(0x06) = _u16TSORegArray[0][0x06];  in HAL_TSO_RestoreRegs()
2163         TSO0_REG(u32temp+0x14) = _u16TSORegArray[0][u32temp+0x14];  in HAL_TSO_RestoreRegs()
2164         TSO0_REG(u32temp+0x15) = _u16TSORegArray[0][u32temp+0x15];  in HAL_TSO_RestoreRegs()
2165         TSO0_REG(u32temp+0x16) = _u16TSORegArray[0][u32temp+0x16];  in HAL_TSO_RestoreRegs()
2171         TSO0_REG(u32ii) = _u16TSORegArray[0][u32ii];  in HAL_TSO_RestoreRegs()
2174     TSO0_REG(0x43) = _u16TSORegArray[0][0x43] & ~0x0004;  in HAL_TSO_RestoreRegs()
2175     TSO0_REG(0x44) = _u16TSORegArray[0][0x44];  in HAL_TSO_RestoreRegs()
2179         TSO0_REG(u32ii+0x4c) = _u16TSORegArray[0][u32ii+0x4c];  in HAL_TSO_RestoreRegs()
2185         TSO0_REG(u32temp+0x60) = _u16TSORegArray[0][u32temp+0x60];  in HAL_TSO_RestoreRegs()
2186         TSO0_REG(u32temp+0x61) = _u16TSORegArray[0][u32temp+0x61];  in HAL_TSO_RestoreRegs()
2187         TSO0_REG(u32temp+0x62) = _u16TSORegArray[0][u32temp+0x62];      in HAL_TSO_RestoreRegs()
2188         TSO0_REG(u32temp+0x63) = _u16TSORegArray[0][u32temp+0x63];  in HAL_TSO_RestoreRegs()
2192     TSO0_REG(0x6a) = _u16TSORegArray[0][0x6a];  in HAL_TSO_RestoreRegs()
2193     TSO0_REG(0x6b) = _u16TSORegArray[0][0x6b];  in HAL_TSO_RestoreRegs()
2197         TSO0_REG(u32ii+0x79) = _u16TSORegArray[0][u32ii+0x79];  in HAL_TSO_RestoreRegs()
2199     TSO0_REG(0x7b) = _u16TSORegArray[0][0x7b];  in HAL_TSO_RestoreRegs()
2200     TSO0_REG(0x7c) = _u16TSORegArray[0][0x7c];  in HAL_TSO_RestoreRegs()
2245         TSO0_REG(0x43) |= 0x0004;  in HAL_TSO_RestoreRegs()
2246         TSO0_REG(0x43) &= ~0x0004;  in HAL_TSO_RestoreRegs()
2250     TSO0_REG(0x1d) |= TSO_CFG1_PKT_PARAM_LD;  in HAL_TSO_RestoreRegs()
2251     TSO0_REG(0x1d) &= ~TSO_CFG1_PKT_PARAM_LD;  in HAL_TSO_RestoreRegs()
2260             TSO0_REG(u32ii+0x79) = _u16TSORegArray[0][u32ii+0x79] | TSO_FICFG_LPCR2_WLD;  in HAL_TSO_RestoreRegs()
2261             TSO0_REG(u32jj+0x6c) = _u16TSORegArray[0][u32jj+0x6c];  in HAL_TSO_RestoreRegs()
2262             TSO0_REG(u32jj+0x6d) = _u16TSORegArray[0][u32jj+0x6d];  in HAL_TSO_RestoreRegs()
2263             TSO0_REG(u32ii+0x79) = _u16TSORegArray[0][u32ii+0x79] & ~TSO_FICFG_LPCR2_WLD;  in HAL_TSO_RestoreRegs()
2264             TSO0_REG(u32temp+0x64) = _u16TSORegArray[0][u32temp+0x64];  in HAL_TSO_RestoreRegs()