Lines Matching refs:HAL_TSP_SetCtrlMode
1243 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM); in _TSP_Close()
3187 HAL_TSP_SetCtrlMode(0, 0x0, TSP_IF_NUM); // Disable TSP0(Reset CPU), Software_Reset in _TSP_Init()
3241 … HAL_TSP_SetCtrlMode(0, TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU in _TSP_Init()
3249 …HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); //… in _TSP_Init()
3258 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM); in _TSP_Init()
3268 …HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); //… in _TSP_Init()
3749 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0); in MDrv_TSP_SetOperateMode()
3756 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 1); in MDrv_TSP_SetOperateMode()
3762 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 2); in MDrv_TSP_SetOperateMode()
3767 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 3); in MDrv_TSP_SetOperateMode()
3773 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 3); in MDrv_TSP_SetOperateMode()
3785 … HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST| TSP_CTRL_TSFILE_EN, TSP_IF_NUM); in MDrv_TSP_SetOperateMode()