Lines Matching refs:pic_param
263 DXVA_PicParams_VP8 *pic_param = (DXVA_PicParams_VP8 *)task->dec.syntax.data; in hal_vp8d_dct_partition_cfg() local
272 if (pic_param->stream_start_offset) in hal_vp8d_dct_partition_cfg()
273 mpp_dev_set_reg_offset(ctx->dev, 27, pic_param->stream_start_offset); in hal_vp8d_dct_partition_cfg()
274 regs->reg5.sw_strm1_start_bit = pic_param->stream_start_bit; in hal_vp8d_dct_partition_cfg()
277 if (pic_param->decMode == VP8HWD_VP8 && !pic_param->frame_type) in hal_vp8d_dct_partition_cfg()
280 len = pic_param->streamEndPos + pic_param->frameTagSize in hal_vp8d_dct_partition_cfg()
281 - pic_param->dctPartitionOffsets[0]; in hal_vp8d_dct_partition_cfg()
282 len += ((1 << pic_param->log2_nbr_of_dct_partitions) - 1) * 3; in hal_vp8d_dct_partition_cfg()
283 len1 = extraBytesPacked + pic_param->dctPartitionOffsets[0]; in hal_vp8d_dct_partition_cfg()
287 len = pic_param->offsetToDctParts + pic_param->frameTagSize - in hal_vp8d_dct_partition_cfg()
288 (pic_param->stream_start_offset - extraBytesPacked); in hal_vp8d_dct_partition_cfg()
292 regs->reg9.sw_coeffs_part_am = (1 << pic_param->log2_nbr_of_dct_partitions); in hal_vp8d_dct_partition_cfg()
294 for (i = 0; i < (RK_U32)(1 << pic_param->log2_nbr_of_dct_partitions); i++) { in hal_vp8d_dct_partition_cfg()
295 addr = extraBytesPacked + pic_param->dctPartitionOffsets[i]; in hal_vp8d_dct_partition_cfg()
456 DXVA_PicParams_VP8 *pic_param = (DXVA_PicParams_VP8 *)task->dec.syntax.data; in hal_vp8d_vdpu1_gen_regs() local
461 mb_width = (pic_param->width + 15) >> 4; in hal_vp8d_vdpu1_gen_regs()
462 mb_height = (pic_param->height + 15) >> 4; in hal_vp8d_vdpu1_gen_regs()
469 if (!pic_param->frame_type) { in hal_vp8d_vdpu1_gen_regs()
478 hal_vp8hw_asic_probe_update(pic_param, probe_ptr); in hal_vp8d_vdpu1_gen_regs()
480 mpp_buf_slot_get_prop(ctx->frame_slots, pic_param->CurrPic.Index7Bits, SLOT_BUFFER, &framebuf); in hal_vp8d_vdpu1_gen_regs()
482 if (!pic_param->frame_type) { //key frame in hal_vp8d_vdpu1_gen_regs()
488 } else if (pic_param->lst_fb_idx.Index7Bits < 0x7f) { //config ref0 base in hal_vp8d_vdpu1_gen_regs()
489 … mpp_buf_slot_get_prop(ctx->frame_slots, pic_param->lst_fb_idx.Index7Bits, SLOT_BUFFER, &framebuf); in hal_vp8d_vdpu1_gen_regs()
496 if (pic_param->gld_fb_idx.Index7Bits < 0x7f) { in hal_vp8d_vdpu1_gen_regs()
497 … mpp_buf_slot_get_prop(ctx->frame_slots, pic_param->gld_fb_idx.Index7Bits, SLOT_BUFFER, &framebuf); in hal_vp8d_vdpu1_gen_regs()
503 if (pic_param->ref_frame_sign_bias_golden) { in hal_vp8d_vdpu1_gen_regs()
504 mpp_dev_set_reg_offset(ctx->dev, 18, pic_param->ref_frame_sign_bias_golden); in hal_vp8d_vdpu1_gen_regs()
508 if (pic_param->alt_fb_idx.Index7Bits < 0x7f) { in hal_vp8d_vdpu1_gen_regs()
509 … mpp_buf_slot_get_prop(ctx->frame_slots, pic_param->alt_fb_idx.Index7Bits, SLOT_BUFFER, &framebuf); in hal_vp8d_vdpu1_gen_regs()
515 if (pic_param->ref_frame_sign_bias_altref) { in hal_vp8d_vdpu1_gen_regs()
516 mpp_dev_set_reg_offset(ctx->dev, 19, pic_param->ref_frame_sign_bias_altref); in hal_vp8d_vdpu1_gen_regs()
519 …if (pic_param->stVP8Segments.segmentation_enabled || pic_param->stVP8Segments.update_mb_segmentati… in hal_vp8d_vdpu1_gen_regs()
520 mpp_dev_set_reg_offset(ctx->dev, 10, (pic_param->stVP8Segments.segmentation_enabled in hal_vp8d_vdpu1_gen_regs()
521 … + (pic_param->stVP8Segments.update_mb_segmentation_map << 1))); in hal_vp8d_vdpu1_gen_regs()
524 regs->reg3.sw_pic_inter_e = pic_param->frame_type; in hal_vp8d_vdpu1_gen_regs()
525 regs->reg3.sw_skip_mode = !pic_param->mb_no_coeff_skip; in hal_vp8d_vdpu1_gen_regs()
527 if (!pic_param->stVP8Segments.segmentation_enabled) { in hal_vp8d_vdpu1_gen_regs()
528 regs->reg32.sw_filt_level_0 = pic_param->filter_level; in hal_vp8d_vdpu1_gen_regs()
529 } else if (pic_param->stVP8Segments.update_mb_segmentation_data) { in hal_vp8d_vdpu1_gen_regs()
531 pic_param->stVP8Segments.segment_feature_data[1][0]; in hal_vp8d_vdpu1_gen_regs()
533 pic_param->stVP8Segments.segment_feature_data[1][1]; in hal_vp8d_vdpu1_gen_regs()
535 pic_param->stVP8Segments.segment_feature_data[1][2]; in hal_vp8d_vdpu1_gen_regs()
537 pic_param->stVP8Segments.segment_feature_data[1][3]; in hal_vp8d_vdpu1_gen_regs()
540 (RK_S32)pic_param->filter_level in hal_vp8d_vdpu1_gen_regs()
541 + pic_param->stVP8Segments.segment_feature_data[1][0]); in hal_vp8d_vdpu1_gen_regs()
543 (RK_S32)pic_param->filter_level in hal_vp8d_vdpu1_gen_regs()
544 + pic_param->stVP8Segments.segment_feature_data[1][1]); in hal_vp8d_vdpu1_gen_regs()
546 (RK_S32)pic_param->filter_level in hal_vp8d_vdpu1_gen_regs()
547 + pic_param->stVP8Segments.segment_feature_data[1][2]); in hal_vp8d_vdpu1_gen_regs()
549 (RK_S32)pic_param->filter_level in hal_vp8d_vdpu1_gen_regs()
550 + pic_param->stVP8Segments.segment_feature_data[1][3]); in hal_vp8d_vdpu1_gen_regs()
553 regs->reg30.sw_filt_type = pic_param->filter_type; in hal_vp8d_vdpu1_gen_regs()
554 regs->reg30.sw_filt_sharpness = pic_param->sharpness; in hal_vp8d_vdpu1_gen_regs()
556 if (pic_param->filter_level == 0) in hal_vp8d_vdpu1_gen_regs()
559 if (pic_param->version != 3) in hal_vp8d_vdpu1_gen_regs()
562 if (pic_param->decMode == VP8HWD_VP8 && (pic_param->version & 0x3)) in hal_vp8d_vdpu1_gen_regs()
565 regs->reg5.sw_boolean_value = pic_param->bool_value; in hal_vp8d_vdpu1_gen_regs()
566 regs->reg5.sw_boolean_range = pic_param->bool_range; in hal_vp8d_vdpu1_gen_regs()
569 if (!pic_param->stVP8Segments.segmentation_enabled) in hal_vp8d_vdpu1_gen_regs()
570 regs->reg33.sw_quant_0 = pic_param->y1ac_delta_q; in hal_vp8d_vdpu1_gen_regs()
571 else if (pic_param->stVP8Segments.update_mb_segmentation_data) { /* absolute mode */ in hal_vp8d_vdpu1_gen_regs()
573 pic_param->stVP8Segments.segment_feature_data[0][0]; in hal_vp8d_vdpu1_gen_regs()
575 pic_param->stVP8Segments.segment_feature_data[0][1]; in hal_vp8d_vdpu1_gen_regs()
576 regs->reg46.sw_quant_2 = pic_param->stVP8Segments.segment_feature_data[0][2]; in hal_vp8d_vdpu1_gen_regs()
577 regs->reg46.sw_quant_3 = pic_param->stVP8Segments.segment_feature_data[0][3]; in hal_vp8d_vdpu1_gen_regs()
580 pic_param->y1ac_delta_q in hal_vp8d_vdpu1_gen_regs()
581 + pic_param->stVP8Segments.segment_feature_data[0][0]); in hal_vp8d_vdpu1_gen_regs()
583 pic_param->y1ac_delta_q in hal_vp8d_vdpu1_gen_regs()
584 + pic_param->stVP8Segments.segment_feature_data[0][1]); in hal_vp8d_vdpu1_gen_regs()
586 pic_param->y1ac_delta_q in hal_vp8d_vdpu1_gen_regs()
587 + pic_param->stVP8Segments.segment_feature_data[0][2]); in hal_vp8d_vdpu1_gen_regs()
589 pic_param->y1ac_delta_q in hal_vp8d_vdpu1_gen_regs()
590 + pic_param->stVP8Segments.segment_feature_data[0][3]); in hal_vp8d_vdpu1_gen_regs()
593 regs->reg33.sw_quant_delta_0 = pic_param->y1dc_delta_q; in hal_vp8d_vdpu1_gen_regs()
594 regs->reg33.sw_quant_delta_1 = pic_param->y2dc_delta_q; in hal_vp8d_vdpu1_gen_regs()
595 regs->reg46.sw_quant_delta_2 = pic_param->y2ac_delta_q; in hal_vp8d_vdpu1_gen_regs()
596 regs->reg46.sw_quant_delta_3 = pic_param->uvdc_delta_q; in hal_vp8d_vdpu1_gen_regs()
597 regs->reg47.sw_quant_delta_4 = pic_param->uvac_delta_q; in hal_vp8d_vdpu1_gen_regs()
599 if (pic_param->mode_ref_lf_delta_enabled) { in hal_vp8d_vdpu1_gen_regs()
600 regs->reg31.sw_filt_ref_adj_0 = pic_param->ref_lf_deltas[0]; in hal_vp8d_vdpu1_gen_regs()
601 regs->reg31.sw_filt_ref_adj_1 = pic_param->ref_lf_deltas[1]; in hal_vp8d_vdpu1_gen_regs()
602 regs->reg31.sw_filt_ref_adj_2 = pic_param->ref_lf_deltas[2]; in hal_vp8d_vdpu1_gen_regs()
603 regs->reg31.sw_filt_ref_adj_3 = pic_param->ref_lf_deltas[3]; in hal_vp8d_vdpu1_gen_regs()
604 regs->reg30.sw_filt_mb_adj_0 = pic_param->mode_lf_deltas[0]; in hal_vp8d_vdpu1_gen_regs()
605 regs->reg30.sw_filt_mb_adj_1 = pic_param->mode_lf_deltas[1]; in hal_vp8d_vdpu1_gen_regs()
606 regs->reg30.sw_filt_mb_adj_2 = pic_param->mode_lf_deltas[2]; in hal_vp8d_vdpu1_gen_regs()
607 regs->reg30.sw_filt_mb_adj_3 = pic_param->mode_lf_deltas[3]; in hal_vp8d_vdpu1_gen_regs()
611 if ((pic_param->version & 0x3) == 0) in hal_vp8d_vdpu1_gen_regs()