196     RK_U32              tile_num;  member
2478 …      RK_U32 tile_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1);  in vepu580_h265_set_hw_address()  local
2494             mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_stream[0], ctx->frame_size / tile_num);  in vepu580_h265_set_hw_address()
2497         if (tile_num > 2) {  in vepu580_h265_set_hw_address()
2499                 mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_stream[1], ctx->frame_size / tile_num);  in vepu580_h265_set_hw_address()
2502                 mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_stream[2], ctx->frame_size / tile_num);  in vepu580_h265_set_hw_address()
2861     RK_U32 tile_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1);  in hal_h265e_v580_start()  local
2871     ctx->tile_num = tile_num;  in hal_h265e_v580_start()
2879     if (tile_num > MAX_TILE_NUM) {  in hal_h265e_v580_start()
2880         mpp_log("tile_num big then support %d, max %d", tile_num, MAX_TILE_NUM);  in hal_h265e_v580_start()
2884     for (k = 0; k < tile_num; k++) {  in hal_h265e_v580_start()
2907         if (tile_num > 1)  in hal_h265e_v580_start()
2951         if (k < tile_num - 1) {  in hal_h265e_v580_start()
3053     if (index == (ctx->tile_num - 1)) {  in vepu580_h265_set_feedback()
3250                         if (finish_cnt + 1 > ctx->tile_num) {  in hal_h265e_v580_wait()
3265                 if (finish_cnt + 1 > ctx->tile_num) {  in hal_h265e_v580_wait()
3282             for (i = 0; i < ctx->tile_num; i ++)  in hal_h265e_v580_wait()
3288         for (i = 0; i < ctx->tile_num; i++) {  in hal_h265e_v580_wait()
3398         for (i = 0; i < ctx->tile_num; i ++) {  in hal_h265e_v580_ret_task()
3427         vepu580_h265_set_feedback(ctx, enc_task, ctx->tile_num - 1);  in hal_h265e_v580_ret_task()