Lines Matching refs:srch_w
264 RK_S32 srch_w = regs->reg0220_me_rnge.cme_srch_h * 4; in vepu580_h265_set_me_ram() local
271 if (x_gmv - srch_w < 0) { in vepu580_h265_set_me_ram()
272 frm_sta = (x_gmv - srch_w - 15) / 16; in vepu580_h265_set_me_ram()
274 frm_sta = (x_gmv - srch_w) / 16; in vepu580_h265_set_me_ram()
277 if (x_gmv + srch_w < 0) { in vepu580_h265_set_me_ram()
278 frm_end = pic_wd64 - 1 + (x_gmv + srch_w) / 16; in vepu580_h265_set_me_ram()
280 frm_end = pic_wd64 - 1 + (x_gmv + srch_w + 15) / 16; in vepu580_h265_set_me_ram()
287 if (x_gmv - srch_w < 0) { in vepu580_h265_set_me_ram()
288 frm_sta = tile_ctu_stax + (x_gmv - srch_w - 15) / 16; in vepu580_h265_set_me_ram()
290 frm_sta = tile_ctu_stax + (x_gmv - srch_w) / 16; in vepu580_h265_set_me_ram()
294 if (x_gmv + srch_w < 0) { in vepu580_h265_set_me_ram()
295 frm_end = tile_ctu_endx + (x_gmv + srch_w) / 16; in vepu580_h265_set_me_ram()
297 frm_end = tile_ctu_endx + (x_gmv + srch_w + 15) / 16; in vepu580_h265_set_me_ram()
309 if ((x_gmv % 16 - srch_w % 16) < 0) { in vepu580_h265_set_me_ram()
310 cur_srch_16_w = (16 + (x_gmv % 16 - srch_w % 16) % 16 + srch_w * 2 + 15) / 16 + 1; in vepu580_h265_set_me_ram()
312 cur_srch_16_w = ((x_gmv % 16 - srch_w % 16) % 16 + srch_w * 2 + 15) / 16 + 1; in vepu580_h265_set_me_ram()