155     MppDevRegOffCfgs    *reg_cfg;  member
1441         if (frm->reg_cfg) {  in hal_h265e_v580_deinit()
1442             mpp_dev_multi_offset_deinit(frm->reg_cfg);  in hal_h265e_v580_deinit()
1443             frm->reg_cfg = NULL;  in hal_h265e_v580_deinit()
1549         mpp_dev_multi_offset_init(&frm_cfg->reg_cfg, 24);  in hal_h265e_v580_init()
1550         frm_cfg->osd_cfg.reg_cfg = frm_cfg->reg_cfg;  in hal_h265e_v580_init()
2466         mpp_dev_multi_offset_update(frm->reg_cfg, 164, ctx->fbc_header_len);  in vepu580_h265_set_hw_address()
2475     mpp_dev_multi_offset_update(frm->reg_cfg, 166, ctx->fbc_header_len);  in vepu580_h265_set_hw_address()
2529     mpp_dev_multi_offset_update(frm->reg_cfg, 175, mpp_packet_get_length(task->packet));  in vepu580_h265_set_hw_address()
2530     mpp_dev_multi_offset_update(frm->reg_cfg, 172, mpp_buffer_get_size(enc_task->output));  in vepu580_h265_set_hw_address()
2562     mpp_dev_multi_offset_update(frm->reg_cfg, 164, width_align * height_align);  in vepu580_h265e_save_pass1_patch()
2599     ret = mpp_dev_multi_offset_update(frm->reg_cfg, 161, frame_size);  in vepu580_h265e_use_pass1_patch()
2604     ret = mpp_dev_multi_offset_update(frm->reg_cfg, 162, frame_size);  in vepu580_h265e_use_pass1_patch()
2906         vepu580_h265_set_patch_info(frm->reg_cfg, syn, (VepuFmt)fmt->format, enc_task);  in hal_h265e_v580_start()
2922                 mpp_dev_multi_offset_update(frm->reg_cfg, 175, offset);  in hal_h265e_v580_start()
2923 …             mpp_dev_multi_offset_update(frm->reg_cfg, 172, mpp_buffer_get_size(enc_task->output));  in hal_h265e_v580_start()
2931                 mpp_dev_multi_offset_update(frm->reg_cfg, 175, 0);  in hal_h265e_v580_start()
2932 …   mpp_dev_multi_offset_update(frm->reg_cfg, 172, mpp_buffer_get_size(frm->hw_tile_stream[k - 1]));  in hal_h265e_v580_start()
2937             mpp_dev_multi_offset_update(frm->reg_cfg, 166, offset);  in hal_h265e_v580_start()
2938             mpp_dev_multi_offset_update(frm->reg_cfg, 164, offset);  in hal_h265e_v580_start()
2949         mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_OFFS, frm->reg_cfg);  in hal_h265e_v580_start()
3374     mpp_dev_multi_offset_reset(frm_cfg->reg_cfg);  in hal_h265e_v580_get_task()