Lines Matching refs:reg
401 static void vepu580_h265_sobel_cfg(hevc_vepu580_wgt *reg) in vepu580_h265_sobel_cfg() argument
403 reg->pre_intra_cla0_B0.pre_intra_cla0_m0 = 10; in vepu580_h265_sobel_cfg()
404 reg->pre_intra_cla0_B0.pre_intra_cla0_m1 = 11; in vepu580_h265_sobel_cfg()
405 reg->pre_intra_cla0_B0.pre_intra_cla0_m2 = 12; in vepu580_h265_sobel_cfg()
406 reg->pre_intra_cla0_B0.pre_intra_cla0_m3 = 13; in vepu580_h265_sobel_cfg()
407 reg->pre_intra_cla0_B0.pre_intra_cla0_m4 = 14; in vepu580_h265_sobel_cfg()
409 reg->pre_intra_cla0_B1.pre_intra_cla0_m5 = 9; in vepu580_h265_sobel_cfg()
410 reg->pre_intra_cla0_B1.pre_intra_cla0_m6 = 15; in vepu580_h265_sobel_cfg()
411 reg->pre_intra_cla0_B1.pre_intra_cla0_m7 = 8; in vepu580_h265_sobel_cfg()
412 reg->pre_intra_cla0_B1.pre_intra_cla0_m8 = 16; in vepu580_h265_sobel_cfg()
413 reg->pre_intra_cla0_B1.pre_intra_cla0_m9 = 7; in vepu580_h265_sobel_cfg()
415 reg->pre_intra_cla1_B0.pre_intra_cla1_m0 = 10; in vepu580_h265_sobel_cfg()
416 reg->pre_intra_cla1_B0.pre_intra_cla1_m1 = 9; in vepu580_h265_sobel_cfg()
417 reg->pre_intra_cla1_B0.pre_intra_cla1_m2 = 8; in vepu580_h265_sobel_cfg()
418 reg->pre_intra_cla1_B0.pre_intra_cla1_m3 = 7; in vepu580_h265_sobel_cfg()
419 reg->pre_intra_cla1_B0.pre_intra_cla1_m4 = 6; in vepu580_h265_sobel_cfg()
420 reg->pre_intra_cla1_B1.pre_intra_cla1_m5 = 11; in vepu580_h265_sobel_cfg()
421 reg->pre_intra_cla1_B1.pre_intra_cla1_m6 = 5; in vepu580_h265_sobel_cfg()
422 reg->pre_intra_cla1_B1.pre_intra_cla1_m7 = 12; in vepu580_h265_sobel_cfg()
423 reg->pre_intra_cla1_B1.pre_intra_cla1_m8 = 4; in vepu580_h265_sobel_cfg()
424 reg->pre_intra_cla1_B1.pre_intra_cla1_m9 = 13; in vepu580_h265_sobel_cfg()
426 reg->pre_intra_cla2_B0.pre_intra_cla2_m0 = 18; in vepu580_h265_sobel_cfg()
427 reg->pre_intra_cla2_B0.pre_intra_cla2_m1 = 17; in vepu580_h265_sobel_cfg()
428 reg->pre_intra_cla2_B0.pre_intra_cla2_m2 = 16; in vepu580_h265_sobel_cfg()
429 reg->pre_intra_cla2_B0.pre_intra_cla2_m3 = 15; in vepu580_h265_sobel_cfg()
430 reg->pre_intra_cla2_B0.pre_intra_cla2_m4 = 14; in vepu580_h265_sobel_cfg()
431 reg->pre_intra_cla2_B1.pre_intra_cla2_m5 = 19; in vepu580_h265_sobel_cfg()
432 reg->pre_intra_cla2_B1.pre_intra_cla2_m6 = 13; in vepu580_h265_sobel_cfg()
433 reg->pre_intra_cla2_B1.pre_intra_cla2_m7 = 20; in vepu580_h265_sobel_cfg()
434 reg->pre_intra_cla2_B1.pre_intra_cla2_m8 = 12; in vepu580_h265_sobel_cfg()
435 reg->pre_intra_cla2_B1.pre_intra_cla2_m9 = 21; in vepu580_h265_sobel_cfg()
437 reg->pre_intra_cla3_B0.pre_intra_cla3_m0 = 18; in vepu580_h265_sobel_cfg()
438 reg->pre_intra_cla3_B0.pre_intra_cla3_m1 = 19; in vepu580_h265_sobel_cfg()
439 reg->pre_intra_cla3_B0.pre_intra_cla3_m2 = 20; in vepu580_h265_sobel_cfg()
440 reg->pre_intra_cla3_B0.pre_intra_cla3_m3 = 21; in vepu580_h265_sobel_cfg()
441 reg->pre_intra_cla3_B0.pre_intra_cla3_m4 = 22; in vepu580_h265_sobel_cfg()
442 reg->pre_intra_cla3_B1.pre_intra_cla3_m5 = 17; in vepu580_h265_sobel_cfg()
443 reg->pre_intra_cla3_B1.pre_intra_cla3_m6 = 23; in vepu580_h265_sobel_cfg()
444 reg->pre_intra_cla3_B1.pre_intra_cla3_m7 = 16; in vepu580_h265_sobel_cfg()
445 reg->pre_intra_cla3_B1.pre_intra_cla3_m8 = 24; in vepu580_h265_sobel_cfg()
446 reg->pre_intra_cla3_B1.pre_intra_cla3_m9 = 15; in vepu580_h265_sobel_cfg()
448 reg->pre_intra_cla4_B0.pre_intra_cla4_m0 = 25; in vepu580_h265_sobel_cfg()
449 reg->pre_intra_cla4_B0.pre_intra_cla4_m1 = 26; in vepu580_h265_sobel_cfg()
450 reg->pre_intra_cla4_B0.pre_intra_cla4_m2 = 24; in vepu580_h265_sobel_cfg()
451 reg->pre_intra_cla4_B0.pre_intra_cla4_m3 = 23; in vepu580_h265_sobel_cfg()
452 reg->pre_intra_cla4_B0.pre_intra_cla4_m4 = 22; in vepu580_h265_sobel_cfg()
453 reg->pre_intra_cla4_B1.pre_intra_cla4_m5 = 27; in vepu580_h265_sobel_cfg()
454 reg->pre_intra_cla4_B1.pre_intra_cla4_m6 = 21; in vepu580_h265_sobel_cfg()
455 reg->pre_intra_cla4_B1.pre_intra_cla4_m7 = 28; in vepu580_h265_sobel_cfg()
456 reg->pre_intra_cla4_B1.pre_intra_cla4_m8 = 20; in vepu580_h265_sobel_cfg()
457 reg->pre_intra_cla4_B1.pre_intra_cla4_m9 = 29; in vepu580_h265_sobel_cfg()
459 reg->pre_intra_cla5_B0.pre_intra_cla5_m0 = 27; in vepu580_h265_sobel_cfg()
460 reg->pre_intra_cla5_B0.pre_intra_cla5_m1 = 26; in vepu580_h265_sobel_cfg()
461 reg->pre_intra_cla5_B0.pre_intra_cla5_m2 = 28; in vepu580_h265_sobel_cfg()
462 reg->pre_intra_cla5_B0.pre_intra_cla5_m3 = 29; in vepu580_h265_sobel_cfg()
463 reg->pre_intra_cla5_B0.pre_intra_cla5_m4 = 30; in vepu580_h265_sobel_cfg()
464 reg->pre_intra_cla5_B1.pre_intra_cla5_m5 = 25; in vepu580_h265_sobel_cfg()
465 reg->pre_intra_cla5_B1.pre_intra_cla5_m6 = 31; in vepu580_h265_sobel_cfg()
466 reg->pre_intra_cla5_B1.pre_intra_cla5_m7 = 24; in vepu580_h265_sobel_cfg()
467 reg->pre_intra_cla5_B1.pre_intra_cla5_m8 = 32; in vepu580_h265_sobel_cfg()
468 reg->pre_intra_cla5_B1.pre_intra_cla5_m9 = 23; in vepu580_h265_sobel_cfg()
470 reg->pre_intra_cla6_B0.pre_intra_cla6_m0 = 34; in vepu580_h265_sobel_cfg()
471 reg->pre_intra_cla6_B0.pre_intra_cla6_m1 = 33; in vepu580_h265_sobel_cfg()
472 reg->pre_intra_cla6_B0.pre_intra_cla6_m2 = 32; in vepu580_h265_sobel_cfg()
473 reg->pre_intra_cla6_B0.pre_intra_cla6_m3 = 31; in vepu580_h265_sobel_cfg()
474 reg->pre_intra_cla6_B0.pre_intra_cla6_m4 = 30; in vepu580_h265_sobel_cfg()
475 reg->pre_intra_cla6_B1.pre_intra_cla6_m5 = 2; in vepu580_h265_sobel_cfg()
476 reg->pre_intra_cla6_B1.pre_intra_cla6_m6 = 29; in vepu580_h265_sobel_cfg()
477 reg->pre_intra_cla6_B1.pre_intra_cla6_m7 = 3; in vepu580_h265_sobel_cfg()
478 reg->pre_intra_cla6_B1.pre_intra_cla6_m8 = 28; in vepu580_h265_sobel_cfg()
479 reg->pre_intra_cla6_B1.pre_intra_cla6_m9 = 4; in vepu580_h265_sobel_cfg()
481 reg->pre_intra_cla7_B0.pre_intra_cla7_m0 = 34; in vepu580_h265_sobel_cfg()
482 reg->pre_intra_cla7_B0.pre_intra_cla7_m1 = 2; in vepu580_h265_sobel_cfg()
483 reg->pre_intra_cla7_B0.pre_intra_cla7_m2 = 3; in vepu580_h265_sobel_cfg()
484 reg->pre_intra_cla7_B0.pre_intra_cla7_m3 = 4; in vepu580_h265_sobel_cfg()
485 reg->pre_intra_cla7_B0.pre_intra_cla7_m4 = 5; in vepu580_h265_sobel_cfg()
486 reg->pre_intra_cla7_B1.pre_intra_cla7_m5 = 33; in vepu580_h265_sobel_cfg()
487 reg->pre_intra_cla7_B1.pre_intra_cla7_m6 = 6; in vepu580_h265_sobel_cfg()
488 reg->pre_intra_cla7_B1.pre_intra_cla7_m7 = 32; in vepu580_h265_sobel_cfg()
489 reg->pre_intra_cla7_B1.pre_intra_cla7_m8 = 7; in vepu580_h265_sobel_cfg()
490 reg->pre_intra_cla7_B1.pre_intra_cla7_m9 = 31; in vepu580_h265_sobel_cfg()
492 reg->pre_intra_cla8_B0.pre_intra_cla8_m0 = 10; in vepu580_h265_sobel_cfg()
493 reg->pre_intra_cla8_B0.pre_intra_cla8_m1 = 26; in vepu580_h265_sobel_cfg()
494 reg->pre_intra_cla8_B0.pre_intra_cla8_m2 = 18; in vepu580_h265_sobel_cfg()
495 reg->pre_intra_cla8_B0.pre_intra_cla8_m3 = 34; in vepu580_h265_sobel_cfg()
496 reg->pre_intra_cla8_B0.pre_intra_cla8_m4 = 6; in vepu580_h265_sobel_cfg()
497 reg->pre_intra_cla8_B1.pre_intra_cla8_m5 = 14; in vepu580_h265_sobel_cfg()
498 reg->pre_intra_cla8_B1.pre_intra_cla8_m6 = 22; in vepu580_h265_sobel_cfg()
499 reg->pre_intra_cla8_B1.pre_intra_cla8_m7 = 30; in vepu580_h265_sobel_cfg()
500 reg->pre_intra_cla8_B1.pre_intra_cla8_m8 = 2; in vepu580_h265_sobel_cfg()
501 reg->pre_intra_cla8_B1.pre_intra_cla8_m9 = 24; in vepu580_h265_sobel_cfg()
503 reg->pre_intra_cla9_B0.pre_intra_cla9_m0 = 0; in vepu580_h265_sobel_cfg()
504 reg->pre_intra_cla9_B0.pre_intra_cla9_m1 = 0; in vepu580_h265_sobel_cfg()
505 reg->pre_intra_cla9_B0.pre_intra_cla9_m2 = 0; in vepu580_h265_sobel_cfg()
506 reg->pre_intra_cla9_B0.pre_intra_cla9_m3 = 0; in vepu580_h265_sobel_cfg()
507 reg->pre_intra_cla9_B0.pre_intra_cla9_m4 = 0; in vepu580_h265_sobel_cfg()
508 reg->pre_intra_cla9_B1.pre_intra_cla9_m5 = 0; in vepu580_h265_sobel_cfg()
509 reg->pre_intra_cla9_B1.pre_intra_cla9_m6 = 0; in vepu580_h265_sobel_cfg()
510 reg->pre_intra_cla9_B1.pre_intra_cla9_m7 = 0; in vepu580_h265_sobel_cfg()
511 reg->pre_intra_cla9_B1.pre_intra_cla9_m8 = 0; in vepu580_h265_sobel_cfg()
512 reg->pre_intra_cla9_B1.pre_intra_cla9_m9 = 0; in vepu580_h265_sobel_cfg()
514 reg->pre_intra_cla10_B0.pre_intra_cla10_m0 = 0; in vepu580_h265_sobel_cfg()
515 reg->pre_intra_cla10_B0.pre_intra_cla10_m1 = 0; in vepu580_h265_sobel_cfg()
516 reg->pre_intra_cla10_B0.pre_intra_cla10_m2 = 0; in vepu580_h265_sobel_cfg()
517 reg->pre_intra_cla10_B0.pre_intra_cla10_m3 = 0; in vepu580_h265_sobel_cfg()
518 reg->pre_intra_cla10_B0.pre_intra_cla10_m4 = 0; in vepu580_h265_sobel_cfg()
519 reg->pre_intra_cla10_B1.pre_intra_cla10_m5 = 0; in vepu580_h265_sobel_cfg()
520 reg->pre_intra_cla10_B1.pre_intra_cla10_m6 = 0; in vepu580_h265_sobel_cfg()
521 reg->pre_intra_cla10_B1.pre_intra_cla10_m7 = 0; in vepu580_h265_sobel_cfg()
522 reg->pre_intra_cla10_B1.pre_intra_cla10_m8 = 0; in vepu580_h265_sobel_cfg()
523 reg->pre_intra_cla10_B1.pre_intra_cla10_m9 = 0; in vepu580_h265_sobel_cfg()
525 reg->pre_intra_cla11_B0.pre_intra_cla11_m0 = 0; in vepu580_h265_sobel_cfg()
526 reg->pre_intra_cla11_B0.pre_intra_cla11_m1 = 0; in vepu580_h265_sobel_cfg()
527 reg->pre_intra_cla11_B0.pre_intra_cla11_m2 = 0; in vepu580_h265_sobel_cfg()
528 reg->pre_intra_cla11_B0.pre_intra_cla11_m3 = 0; in vepu580_h265_sobel_cfg()
529 reg->pre_intra_cla11_B0.pre_intra_cla11_m4 = 0; in vepu580_h265_sobel_cfg()
530 reg->pre_intra_cla11_B1.pre_intra_cla11_m5 = 0; in vepu580_h265_sobel_cfg()
531 reg->pre_intra_cla11_B1.pre_intra_cla11_m6 = 0; in vepu580_h265_sobel_cfg()
532 reg->pre_intra_cla11_B1.pre_intra_cla11_m7 = 0; in vepu580_h265_sobel_cfg()
533 reg->pre_intra_cla11_B1.pre_intra_cla11_m8 = 0; in vepu580_h265_sobel_cfg()
534 reg->pre_intra_cla11_B1.pre_intra_cla11_m9 = 0; in vepu580_h265_sobel_cfg()
536 reg->pre_intra_cla12_B0.pre_intra_cla12_m0 = 0; in vepu580_h265_sobel_cfg()
537 reg->pre_intra_cla12_B0.pre_intra_cla12_m1 = 0; in vepu580_h265_sobel_cfg()
538 reg->pre_intra_cla12_B0.pre_intra_cla12_m2 = 0; in vepu580_h265_sobel_cfg()
539 reg->pre_intra_cla12_B0.pre_intra_cla12_m3 = 0; in vepu580_h265_sobel_cfg()
540 reg->pre_intra_cla12_B0.pre_intra_cla12_m4 = 0; in vepu580_h265_sobel_cfg()
541 reg->pre_intra_cla12_B1.pre_intra_cla12_m5 = 0; in vepu580_h265_sobel_cfg()
542 reg->pre_intra_cla12_B1.pre_intra_cla12_m6 = 0; in vepu580_h265_sobel_cfg()
543 reg->pre_intra_cla12_B1.pre_intra_cla12_m7 = 0; in vepu580_h265_sobel_cfg()
544 reg->pre_intra_cla12_B1.pre_intra_cla12_m8 = 0; in vepu580_h265_sobel_cfg()
545 reg->pre_intra_cla12_B1.pre_intra_cla12_m9 = 0; in vepu580_h265_sobel_cfg()
547 reg->pre_intra_cla13_B0.pre_intra_cla13_m0 = 0; in vepu580_h265_sobel_cfg()
548 reg->pre_intra_cla13_B0.pre_intra_cla13_m1 = 0; in vepu580_h265_sobel_cfg()
549 reg->pre_intra_cla13_B0.pre_intra_cla13_m2 = 0; in vepu580_h265_sobel_cfg()
550 reg->pre_intra_cla13_B0.pre_intra_cla13_m3 = 0; in vepu580_h265_sobel_cfg()
551 reg->pre_intra_cla13_B0.pre_intra_cla13_m4 = 0; in vepu580_h265_sobel_cfg()
552 reg->pre_intra_cla13_B1.pre_intra_cla13_m5 = 0; in vepu580_h265_sobel_cfg()
553 reg->pre_intra_cla13_B1.pre_intra_cla13_m6 = 0; in vepu580_h265_sobel_cfg()
554 reg->pre_intra_cla13_B1.pre_intra_cla13_m7 = 0; in vepu580_h265_sobel_cfg()
555 reg->pre_intra_cla13_B1.pre_intra_cla13_m8 = 0; in vepu580_h265_sobel_cfg()
556 reg->pre_intra_cla13_B1.pre_intra_cla13_m9 = 0; in vepu580_h265_sobel_cfg()
558 reg->pre_intra_cla14_B0.pre_intra_cla14_m0 = 0; in vepu580_h265_sobel_cfg()
559 reg->pre_intra_cla14_B0.pre_intra_cla14_m1 = 0; in vepu580_h265_sobel_cfg()
560 reg->pre_intra_cla14_B0.pre_intra_cla14_m2 = 0; in vepu580_h265_sobel_cfg()
561 reg->pre_intra_cla14_B0.pre_intra_cla14_m3 = 0; in vepu580_h265_sobel_cfg()
562 reg->pre_intra_cla14_B0.pre_intra_cla14_m4 = 0; in vepu580_h265_sobel_cfg()
563 reg->pre_intra_cla14_B1.pre_intra_cla14_m5 = 0; in vepu580_h265_sobel_cfg()
564 reg->pre_intra_cla14_B1.pre_intra_cla14_m6 = 0; in vepu580_h265_sobel_cfg()
565 reg->pre_intra_cla14_B1.pre_intra_cla14_m7 = 0; in vepu580_h265_sobel_cfg()
566 reg->pre_intra_cla14_B1.pre_intra_cla14_m8 = 0; in vepu580_h265_sobel_cfg()
567 reg->pre_intra_cla14_B1.pre_intra_cla14_m9 = 0; in vepu580_h265_sobel_cfg()
569 reg->pre_intra_cla15_B0.pre_intra_cla15_m0 = 0; in vepu580_h265_sobel_cfg()
570 reg->pre_intra_cla15_B0.pre_intra_cla15_m1 = 0; in vepu580_h265_sobel_cfg()
571 reg->pre_intra_cla15_B0.pre_intra_cla15_m2 = 0; in vepu580_h265_sobel_cfg()
572 reg->pre_intra_cla15_B0.pre_intra_cla15_m3 = 0; in vepu580_h265_sobel_cfg()
573 reg->pre_intra_cla15_B0.pre_intra_cla15_m4 = 0; in vepu580_h265_sobel_cfg()
574 reg->pre_intra_cla15_B1.pre_intra_cla15_m5 = 0; in vepu580_h265_sobel_cfg()
575 reg->pre_intra_cla15_B1.pre_intra_cla15_m6 = 0; in vepu580_h265_sobel_cfg()
576 reg->pre_intra_cla15_B1.pre_intra_cla15_m7 = 0; in vepu580_h265_sobel_cfg()
577 reg->pre_intra_cla15_B1.pre_intra_cla15_m8 = 0; in vepu580_h265_sobel_cfg()
578 reg->pre_intra_cla15_B1.pre_intra_cla15_m9 = 0; in vepu580_h265_sobel_cfg()
580 reg->pre_intra_cla16_B0.pre_intra_cla16_m0 = 0; in vepu580_h265_sobel_cfg()
581 reg->pre_intra_cla16_B0.pre_intra_cla16_m1 = 0; in vepu580_h265_sobel_cfg()
582 reg->pre_intra_cla16_B0.pre_intra_cla16_m2 = 0; in vepu580_h265_sobel_cfg()
583 reg->pre_intra_cla16_B0.pre_intra_cla16_m3 = 0; in vepu580_h265_sobel_cfg()
584 reg->pre_intra_cla16_B0.pre_intra_cla16_m4 = 0; in vepu580_h265_sobel_cfg()
585 reg->pre_intra_cla16_B1.pre_intra_cla16_m5 = 0; in vepu580_h265_sobel_cfg()
586 reg->pre_intra_cla16_B1.pre_intra_cla16_m6 = 0; in vepu580_h265_sobel_cfg()
587 reg->pre_intra_cla16_B1.pre_intra_cla16_m7 = 0; in vepu580_h265_sobel_cfg()
588 reg->pre_intra_cla16_B1.pre_intra_cla16_m8 = 0; in vepu580_h265_sobel_cfg()
589 reg->pre_intra_cla16_B1.pre_intra_cla16_m9 = 0; in vepu580_h265_sobel_cfg()
591 reg->i16_sobel_t.intra_l16_sobel_t0 = 64; in vepu580_h265_sobel_cfg()
592 reg->i16_sobel_t.intra_l16_sobel_t1 = 200; in vepu580_h265_sobel_cfg()
593 reg->i16_sobel_a_00.intra_l16_sobel_a0_qp0 = 32; in vepu580_h265_sobel_cfg()
594 reg->i16_sobel_a_00.intra_l16_sobel_a0_qp1 = 32; in vepu580_h265_sobel_cfg()
595 reg->i16_sobel_a_00.intra_l16_sobel_a0_qp2 = 32; in vepu580_h265_sobel_cfg()
596 reg->i16_sobel_a_00.intra_l16_sobel_a0_qp3 = 32; in vepu580_h265_sobel_cfg()
597 reg->i16_sobel_a_00.intra_l16_sobel_a0_qp4 = 32; in vepu580_h265_sobel_cfg()
598 reg->i16_sobel_a_01.intra_l16_sobel_a0_qp5 = 32; in vepu580_h265_sobel_cfg()
599 reg->i16_sobel_a_01.intra_l16_sobel_a0_qp6 = 32; in vepu580_h265_sobel_cfg()
600 reg->i16_sobel_a_01.intra_l16_sobel_a0_qp7 = 32; in vepu580_h265_sobel_cfg()
601 reg->i16_sobel_a_01.intra_l16_sobel_a0_qp8 = 32; in vepu580_h265_sobel_cfg()
602 reg->i16_sobel_b_00.intra_l16_sobel_b0_qp0 = 0; in vepu580_h265_sobel_cfg()
603 reg->i16_sobel_b_00.intra_l16_sobel_b0_qp1 = 0; in vepu580_h265_sobel_cfg()
604 reg->i16_sobel_b_01.intra_l16_sobel_b0_qp2 = 0; in vepu580_h265_sobel_cfg()
605 reg->i16_sobel_b_01.intra_l16_sobel_b0_qp3 = 0; in vepu580_h265_sobel_cfg()
606 reg->i16_sobel_b_02.intra_l16_sobel_b0_qp4 = 0; in vepu580_h265_sobel_cfg()
607 reg->i16_sobel_b_02.intra_l16_sobel_b0_qp5 = 0; in vepu580_h265_sobel_cfg()
608 reg->i16_sobel_b_03.intra_l16_sobel_b0_qp6 = 0; in vepu580_h265_sobel_cfg()
609 reg->i16_sobel_b_03.intra_l16_sobel_b0_qp7 = 0; in vepu580_h265_sobel_cfg()
610 reg->i16_sobel_b_04.intra_l16_sobel_b0_qp8 = 0; in vepu580_h265_sobel_cfg()
611 reg->i16_sobel_c_00.intra_l16_sobel_c0_qp0 = 13; in vepu580_h265_sobel_cfg()
612 reg->i16_sobel_c_00.intra_l16_sobel_c0_qp1 = 13; in vepu580_h265_sobel_cfg()
613 reg->i16_sobel_c_00.intra_l16_sobel_c0_qp2 = 13; in vepu580_h265_sobel_cfg()
614 reg->i16_sobel_c_00.intra_l16_sobel_c0_qp3 = 13; in vepu580_h265_sobel_cfg()
615 reg->i16_sobel_c_00.intra_l16_sobel_c0_qp4 = 13; in vepu580_h265_sobel_cfg()
616 reg->i16_sobel_c_01.intra_l16_sobel_c0_qp5 = 13; in vepu580_h265_sobel_cfg()
617 reg->i16_sobel_c_01.intra_l16_sobel_c0_qp6 = 13; in vepu580_h265_sobel_cfg()
618 reg->i16_sobel_c_01.intra_l16_sobel_c0_qp7 = 13; in vepu580_h265_sobel_cfg()
619 reg->i16_sobel_c_01.intra_l16_sobel_c0_qp8 = 13; in vepu580_h265_sobel_cfg()
620 reg->i16_sobel_d_00.intra_l16_sobel_d0_qp0 = 23750; in vepu580_h265_sobel_cfg()
621 reg->i16_sobel_d_00.intra_l16_sobel_d0_qp1 = 23750; in vepu580_h265_sobel_cfg()
622 reg->i16_sobel_d_01.intra_l16_sobel_d0_qp2 = 23750; in vepu580_h265_sobel_cfg()
623 reg->i16_sobel_d_01.intra_l16_sobel_d0_qp3 = 23750; in vepu580_h265_sobel_cfg()
624 reg->i16_sobel_d_02.intra_l16_sobel_d0_qp4 = 23750; in vepu580_h265_sobel_cfg()
625 reg->i16_sobel_d_02.intra_l16_sobel_d0_qp5 = 23750; in vepu580_h265_sobel_cfg()
626 reg->i16_sobel_d_03.intra_l16_sobel_d0_qp6 = 23750; in vepu580_h265_sobel_cfg()
627 reg->i16_sobel_d_03.intra_l16_sobel_d0_qp7 = 23750; in vepu580_h265_sobel_cfg()
628 reg->i16_sobel_d_04.intra_l16_sobel_d0_qp8 = 23750; in vepu580_h265_sobel_cfg()
630 reg->intra_l16_sobel_e0_qp0_low = 20000; in vepu580_h265_sobel_cfg()
631 reg->intra_l16_sobel_e0_qp1_low = 20000; in vepu580_h265_sobel_cfg()
632 reg->intra_l16_sobel_e0_qp2_low = 20000; in vepu580_h265_sobel_cfg()
633 reg->intra_l16_sobel_e0_qp3_low = 20000; in vepu580_h265_sobel_cfg()
634 reg->intra_l16_sobel_e0_qp4_low = 20000; in vepu580_h265_sobel_cfg()
635 reg->intra_l16_sobel_e0_qp5_low = 20000; in vepu580_h265_sobel_cfg()
636 reg->intra_l16_sobel_e0_qp6_low = 20000; in vepu580_h265_sobel_cfg()
637 reg->intra_l16_sobel_e0_qp7_low = 20000; in vepu580_h265_sobel_cfg()
638 reg->intra_l16_sobel_e0_qp8_low = 20000; in vepu580_h265_sobel_cfg()
639 reg->i16_sobel_e_01.intra_l16_sobel_e0_qp0_high = 0; in vepu580_h265_sobel_cfg()
640 reg->i16_sobel_e_03.intra_l16_sobel_e0_qp1_high = 0; in vepu580_h265_sobel_cfg()
641 reg->i16_sobel_e_05.intra_l16_sobel_e0_qp2_high = 0; in vepu580_h265_sobel_cfg()
642 reg->i16_sobel_e_07.intra_l16_sobel_e0_qp3_high = 0; in vepu580_h265_sobel_cfg()
643 reg->i16_sobel_e_09.intra_l16_sobel_e0_qp4_high = 0; in vepu580_h265_sobel_cfg()
644 reg->i16_sobel_e_11.intra_l16_sobel_e0_qp5_high = 0; in vepu580_h265_sobel_cfg()
645 reg->i16_sobel_e_13.intra_l16_sobel_e0_qp6_high = 0; in vepu580_h265_sobel_cfg()
646 reg->i16_sobel_e_15.intra_l16_sobel_e0_qp7_high = 0; in vepu580_h265_sobel_cfg()
647 reg->i16_sobel_e_17.intra_l16_sobel_e0_qp8_high = 0; in vepu580_h265_sobel_cfg()
649 reg->i32_sobel_t_00.intra_l32_sobel_t2 = 64; in vepu580_h265_sobel_cfg()
650 reg->i32_sobel_t_00.intra_l32_sobel_t3 = 400; in vepu580_h265_sobel_cfg()
651 reg->i32_sobel_t_01.intra_l32_sobel_t4 = 8; in vepu580_h265_sobel_cfg()
652 reg->i32_sobel_t_02.intra_l32_sobel_t5 = 100; in vepu580_h265_sobel_cfg()
653 reg->i32_sobel_t_02.intra_l32_sobel_t6 = 100; in vepu580_h265_sobel_cfg()
655 reg->i32_sobel_a.intra_l32_sobel_a1_qp0 = 18; in vepu580_h265_sobel_cfg()
656 reg->i32_sobel_a.intra_l32_sobel_a1_qp1 = 18; in vepu580_h265_sobel_cfg()
657 reg->i32_sobel_a.intra_l32_sobel_a1_qp2 = 18; in vepu580_h265_sobel_cfg()
658 reg->i32_sobel_a.intra_l32_sobel_a1_qp3 = 18; in vepu580_h265_sobel_cfg()
659 reg->i32_sobel_a.intra_l32_sobel_a1_qp4 = 18; in vepu580_h265_sobel_cfg()
661 reg->i32_sobel_b_00.intra_l32_sobel_b1_qp0 = 0; in vepu580_h265_sobel_cfg()
662 reg->i32_sobel_b_00.intra_l32_sobel_b1_qp1 = 0; in vepu580_h265_sobel_cfg()
663 reg->i32_sobel_b_01.intra_l32_sobel_b1_qp2 = 0; in vepu580_h265_sobel_cfg()
664 reg->i32_sobel_b_01.intra_l32_sobel_b1_qp3 = 0; in vepu580_h265_sobel_cfg()
665 reg->i32_sobel_b_02.intra_l32_sobel_b1_qp4 = 0; in vepu580_h265_sobel_cfg()
667 reg->i32_sobel_c.intra_l32_sobel_c1_qp0 = 16; in vepu580_h265_sobel_cfg()
668 reg->i32_sobel_c.intra_l32_sobel_c1_qp1 = 16; in vepu580_h265_sobel_cfg()
669 reg->i32_sobel_c.intra_l32_sobel_c1_qp2 = 16; in vepu580_h265_sobel_cfg()
670 reg->i32_sobel_c.intra_l32_sobel_c1_qp3 = 16; in vepu580_h265_sobel_cfg()
671 reg->i32_sobel_c.intra_l32_sobel_c1_qp4 = 16; in vepu580_h265_sobel_cfg()
673 reg->i32_sobel_d_00.intra_l32_sobel_d1_qp0 = 0; in vepu580_h265_sobel_cfg()
674 reg->i32_sobel_d_00.intra_l32_sobel_d1_qp1 = 0; in vepu580_h265_sobel_cfg()
675 reg->i32_sobel_d_01.intra_l32_sobel_d1_qp2 = 0; in vepu580_h265_sobel_cfg()
676 reg->i32_sobel_d_01.intra_l32_sobel_d1_qp3 = 0; in vepu580_h265_sobel_cfg()
677 reg->i32_sobel_d_02.intra_l32_sobel_d1_qp4 = 0; in vepu580_h265_sobel_cfg()
679 reg->intra_l32_sobel_e1_qp0_low = 20000; in vepu580_h265_sobel_cfg()
680 reg->intra_l32_sobel_e1_qp1_low = 20000; in vepu580_h265_sobel_cfg()
681 reg->intra_l32_sobel_e1_qp2_low = 20000; in vepu580_h265_sobel_cfg()
682 reg->intra_l32_sobel_e1_qp3_low = 20000; in vepu580_h265_sobel_cfg()
683 reg->intra_l32_sobel_e1_qp4_low = 20000; in vepu580_h265_sobel_cfg()
685 reg->i32_sobel_e_01.intra_l32_sobel_e1_qp0_high = 0; in vepu580_h265_sobel_cfg()
686 reg->i32_sobel_e_03.intra_l32_sobel_e1_qp1_high = 0; in vepu580_h265_sobel_cfg()
687 reg->i32_sobel_e_05.intra_l32_sobel_e1_qp2_high = 0; in vepu580_h265_sobel_cfg()
688 reg->i32_sobel_e_07.intra_l32_sobel_e1_qp3_high = 0; in vepu580_h265_sobel_cfg()
689 reg->i32_sobel_e_09.intra_l32_sobel_e1_qp4_high = 0; in vepu580_h265_sobel_cfg()
692 static void vepu580_h265_rdo_bias_cfg (vepu580_rdo_cfg *reg, MppEncHwCfg *hw) in vepu580_h265_rdo_bias_cfg() argument
698 p_rdo_atf = ®->rdo_b64_inter_atf; in vepu580_h265_rdo_bias_cfg()
715 p_rdo_atf_skip = ®->rdo_b64_skip_atf; in vepu580_h265_rdo_bias_cfg()
741 p_rdo_atf = ®->rdo_b32_intra_atf; in vepu580_h265_rdo_bias_cfg()
757 p_rdo_atf = ®->rdo_b32_inter_atf; in vepu580_h265_rdo_bias_cfg()
774 p_rdo_atf_skip = ®->rdo_b32_skip_atf; in vepu580_h265_rdo_bias_cfg()
796 p_rdo_atf = ®->rdo_b16_intra_atf; in vepu580_h265_rdo_bias_cfg()
812 p_rdo_atf = ®->rdo_b16_inter_atf; in vepu580_h265_rdo_bias_cfg()
829 p_rdo_atf_skip = ®->rdo_b16_skip_atf; in vepu580_h265_rdo_bias_cfg()
851 p_rdo_atf = ®->rdo_b8_intra_atf; in vepu580_h265_rdo_bias_cfg()
867 p_rdo_atf = ®->rdo_b8_inter_atf; in vepu580_h265_rdo_bias_cfg()
884 p_rdo_atf_skip = ®->rdo_b8_skip_atf; in vepu580_h265_rdo_bias_cfg()
905 static void vepu580_h265_rdo_cfg (vepu580_rdo_cfg *reg) in vepu580_h265_rdo_cfg() argument
909 reg->rdo_sqi_cfg.rdo_segment_en = 1; in vepu580_h265_rdo_cfg()
910 reg->rdo_sqi_cfg.rdo_smear_en = 1; in vepu580_h265_rdo_cfg()
911 p_rdo_atf = ®->rdo_b64_inter_atf; in vepu580_h265_rdo_cfg()
936 p_rdo_atf_skip = ®->rdo_b64_skip_atf; in vepu580_h265_rdo_cfg()
963 p_rdo_atf = ®->rdo_b32_intra_atf; in vepu580_h265_rdo_cfg()
988 p_rdo_atf = ®->rdo_b32_inter_atf; in vepu580_h265_rdo_cfg()
1013 p_rdo_atf_skip = ®->rdo_b32_skip_atf; in vepu580_h265_rdo_cfg()
1040 p_rdo_atf = ®->rdo_b16_intra_atf; in vepu580_h265_rdo_cfg()
1065 p_rdo_atf = ®->rdo_b16_inter_atf; in vepu580_h265_rdo_cfg()
1090 p_rdo_atf_skip = ®->rdo_b16_skip_atf; in vepu580_h265_rdo_cfg()
1117 p_rdo_atf = ®->rdo_b8_intra_atf; in vepu580_h265_rdo_cfg()
1142 p_rdo_atf = ®->rdo_b8_inter_atf; in vepu580_h265_rdo_cfg()
1167 p_rdo_atf_skip = ®->rdo_b8_skip_atf; in vepu580_h265_rdo_cfg()
1194 reg->rdo_segment_b64_thd0.rdo_segment_cu64_th0 = 160; in vepu580_h265_rdo_cfg()
1195 reg->rdo_segment_b64_thd0.rdo_segment_cu64_th1 = 96; in vepu580_h265_rdo_cfg()
1196 reg->rdo_segment_b64_thd1.rdo_segment_cu64_th2 = 30; in vepu580_h265_rdo_cfg()
1197 reg->rdo_segment_b64_thd1.rdo_segment_cu64_th3 = 0; in vepu580_h265_rdo_cfg()
1198 reg->rdo_segment_b64_thd1.rdo_segment_cu64_th4 = 1; in vepu580_h265_rdo_cfg()
1199 reg->rdo_segment_b64_thd1.rdo_segment_cu64_th5_minus1 = 4; in vepu580_h265_rdo_cfg()
1200 reg->rdo_segment_b64_thd1.rdo_segment_cu64_th6_minus1 = 11; in vepu580_h265_rdo_cfg()
1202 reg->rdo_segment_b32_thd0.rdo_segment_cu32_th0 = 160; in vepu580_h265_rdo_cfg()
1203 reg->rdo_segment_b32_thd0.rdo_segment_cu32_th1 = 96; in vepu580_h265_rdo_cfg()
1204 reg->rdo_segment_b32_thd1.rdo_segment_cu32_th2 = 30; in vepu580_h265_rdo_cfg()
1205 reg->rdo_segment_b32_thd1.rdo_segment_cu32_th3 = 0; in vepu580_h265_rdo_cfg()
1206 reg->rdo_segment_b32_thd1.rdo_segment_cu32_th4 = 1; in vepu580_h265_rdo_cfg()
1207 reg->rdo_segment_b32_thd1.rdo_segment_cu32_th5_minus1 = 2; in vepu580_h265_rdo_cfg()
1208 reg->rdo_segment_b32_thd1.rdo_segment_cu32_th6_minus1 = 3; in vepu580_h265_rdo_cfg()
1210 reg->rdo_segment_multi.rdo_segment_cu64_multi = 22; in vepu580_h265_rdo_cfg()
1211 reg->rdo_segment_multi.rdo_segment_cu32_multi = 22; in vepu580_h265_rdo_cfg()
1212 reg->rdo_segment_multi.rdo_smear_cu16_multi = 6; in vepu580_h265_rdo_cfg()
1214 reg->rdo_b16_smear_thd0.rdo_smear_cu16_cime_sad_th0 = 64; in vepu580_h265_rdo_cfg()
1215 reg->rdo_b16_smear_thd0.rdo_smear_cu16_cime_sad_th1 = 32; in vepu580_h265_rdo_cfg()
1216 reg->rdo_b16_smear_thd1.rdo_smear_cu16_cime_sad_th2 = 36; in vepu580_h265_rdo_cfg()
1217 reg->rdo_b16_smear_thd1.rdo_smear_cu16_cime_sad_th3 = 64; in vepu580_h265_rdo_cfg()
1220 reg->preintra_b32_cst_var_thd.pre_intra32_cst_var_th00 = 9; in vepu580_h265_rdo_cfg()
1221 reg->preintra_b32_cst_var_thd.pre_intra32_cst_var_th01 = 4; in vepu580_h265_rdo_cfg()
1222 reg->preintra_b32_cst_var_thd.pre_intra32_mode_th = 5; in vepu580_h265_rdo_cfg()
1224 reg->preintra_b32_cst_wgt.pre_intra32_cst_wgt00 = 31; in vepu580_h265_rdo_cfg()
1225 reg->preintra_b32_cst_wgt.pre_intra32_cst_wgt01 = 25; in vepu580_h265_rdo_cfg()
1227 reg->preintra_b16_cst_var_thd.pre_intra16_cst_var_th00 = 9; in vepu580_h265_rdo_cfg()
1228 reg->preintra_b16_cst_var_thd.pre_intra16_cst_var_th01 = 4; in vepu580_h265_rdo_cfg()
1229 reg->preintra_b16_cst_var_thd.pre_intra16_mode_th = 5; in vepu580_h265_rdo_cfg()
1231 reg->preintra_b16_cst_wgt.pre_intra16_cst_wgt00 = 31; in vepu580_h265_rdo_cfg()
1232 reg->preintra_b16_cst_wgt.pre_intra16_cst_wgt01 = 25; in vepu580_h265_rdo_cfg()
1235 static void vepu580_h265_scl_cfg(vepu580_rdo_cfg *reg) in vepu580_h265_scl_cfg() argument
1328 memcpy(®->scaling_list_reg[0], vepu580_h265_scl_tab, sizeof(vepu580_h265_scl_tab)); in vepu580_h265_scl_cfg()
2171 cfg.reg = (RK_U32*)&hw_regs->reg_ctl; in hal_h265e_v580_send_regs()
2188 cfg.reg = &hw_regs->reg_base; in hal_h265e_v580_send_regs()
2209 cfg.reg = &hw_regs->reg_rc_klut; in hal_h265e_v580_send_regs()
2227 cfg.reg = &hw_regs->reg_wgt; in hal_h265e_v580_send_regs()
2244 cfg.reg = &hw_regs->reg_rdo; in hal_h265e_v580_send_regs()
2254 cfg.reg = &hw_regs->reg_osd_cfg; in hal_h265e_v580_send_regs()
2264 cfg1.reg = ®_out->hw_status; in hal_h265e_v580_send_regs()
2274 cfg1.reg = ®_out->st; in hal_h265e_v580_send_regs()