Lines Matching refs:pic_wd64
268 RK_U32 pic_wd64 = ((regs->reg0196_enc_rsl.pic_wd8_m1 + 1) * 8 + 63) / 64; in vepu580_h265_set_me_ram() local
276 frm_sta = mpp_clip(frm_sta, 0, pic_wd64 - 1); in vepu580_h265_set_me_ram()
278 frm_end = pic_wd64 - 1 + (x_gmv + srch_w) / 16; in vepu580_h265_set_me_ram()
280 frm_end = pic_wd64 - 1 + (x_gmv + srch_w + 15) / 16; in vepu580_h265_set_me_ram()
282 frm_end = mpp_clip(frm_end, 0, pic_wd64 - 1); in vepu580_h265_set_me_ram()
292 frm_sta = mpp_clip(frm_sta, 0, pic_wd64 - 1); in vepu580_h265_set_me_ram()
299 frm_end = mpp_clip(frm_end, 0, pic_wd64 - 1); in vepu580_h265_set_me_ram()
2320 RK_S32 pic_wd64 = MPP_ALIGN(syn->pp.pic_width, 64) >> 6; in vepu580_h265_set_me_regs() local
2399 … (pic_wd64 * (tmpMin - 1)) + ((pic_wd64 >= swin_scope_wd16) ? swin_scope_wd16 : pic_wd64 * 2); in vepu580_h265_set_me_regs()
2403 pic_wd64 = pic_wd64 << 6; in vepu580_h265_set_me_regs()
2405 if (pic_wd64 <= 512) in vepu580_h265_set_me_regs()
2407 else if (pic_wd64 <= 1024) in vepu580_h265_set_me_regs()
2409 else if (pic_wd64 <= 2048) in vepu580_h265_set_me_regs()
2411 else if (pic_wd64 <= 4096) in vepu580_h265_set_me_regs()
2683 RK_S32 pic_wd64, pic_h64; in hal_h265e_v580_gen_regs() local
2693 pic_wd64 = (syn->pp.pic_width + 63) / 64; in hal_h265e_v580_gen_regs()
2752 reg_base->reg0192_enc_pic.log2_ctu_num = ceil(log2((double)pic_wd64 * pic_h64)); in hal_h265e_v580_gen_regs()