56     RK_U32 hw_status; /* 0:corret, 1:error */  member
2264     cfg1.reg = &reg_out->hw_status;  in hal_h265e_v580_send_regs()
3000     RK_U32 hw_status = elem->hw_status;  in vepu580_h265_set_feedback()  local
3009     fb->hw_status = hw_status;  in vepu580_h265_set_feedback()
3010     hal_h265e_dbg_detail("hw_status: 0x%08x", hw_status);  in vepu580_h265_set_feedback()
3011     if (hw_status & RKV_ENC_INT_LINKTABLE_FINISH)  in vepu580_h265_set_feedback()
3014     if (hw_status & RKV_ENC_INT_ONE_FRAME_FINISH)  in vepu580_h265_set_feedback()
3017     if (hw_status & RKV_ENC_INT_ONE_SLICE_FINISH)  in vepu580_h265_set_feedback()
3020     if (hw_status & RKV_ENC_INT_SAFE_CLEAR_FINISH)  in vepu580_h265_set_feedback()
3023     if (hw_status & RKV_ENC_INT_BIT_STREAM_OVERFLOW)  in vepu580_h265_set_feedback()
3026     if (hw_status & RKV_ENC_INT_BUS_WRITE_FULL)  in vepu580_h265_set_feedback()
3029     if (hw_status & RKV_ENC_INT_BUS_WRITE_ERROR)  in vepu580_h265_set_feedback()
3032     if (hw_status & RKV_ENC_INT_BUS_READ_ERROR)  in vepu580_h265_set_feedback()
3035     if (hw_status & RKV_ENC_INT_TIMEOUT_ERROR)  in vepu580_h265_set_feedback()
3137 static MPP_RET hal_h265e_vepu580_status_check(RK_U32 hw_status)  in hal_h265e_vepu580_status_check()  argument
3141     if (hw_status & RKV_ENC_INT_LINKTABLE_FINISH)  in hal_h265e_vepu580_status_check()
3144     if (hw_status & RKV_ENC_INT_ONE_FRAME_FINISH)  in hal_h265e_vepu580_status_check()
3147     if (hw_status & RKV_ENC_INT_ONE_SLICE_FINISH)  in hal_h265e_vepu580_status_check()
3150     if (hw_status & RKV_ENC_INT_SAFE_CLEAR_FINISH)  in hal_h265e_vepu580_status_check()
3153     if (hw_status & RKV_ENC_INT_BIT_STREAM_OVERFLOW)  in hal_h265e_vepu580_status_check()
3156     if (hw_status & RKV_ENC_INT_BUS_WRITE_FULL) {  in hal_h265e_vepu580_status_check()
3161     if (hw_status & RKV_ENC_INT_BUS_WRITE_ERROR) {  in hal_h265e_vepu580_status_check()
3166     if (hw_status & RKV_ENC_INT_BUS_READ_ERROR) {  in hal_h265e_vepu580_status_check()
3171     if (hw_status & RKV_ENC_INT_TIMEOUT_ERROR) {  in hal_h265e_vepu580_status_check()
3290             RK_U32 hw_status = elem_ret->hw_status;  in hal_h265e_v580_wait()  local
3293             ret = hal_h265e_vepu580_status_check(hw_status);  in hal_h265e_v580_wait()
3300                 (hw_status & (RKV_ENC_INT_BUS_WRITE_ERROR | RKV_ENC_INT_BUS_READ_ERROR))) {  in hal_h265e_v580_wait()
3307             mpp_err_f("poll cmd failed %d status %d \n", ret, elem->hw_status);  in hal_h265e_v580_wait()