Lines Matching refs:hw
692 static void vepu580_h265_rdo_bias_cfg (vepu580_rdo_cfg *reg, MppEncHwCfg *hw) in vepu580_h265_rdo_bias_cfg() argument
696 RK_U8 bias = h265e_mode_bias[hw->mode_bias[4]]; in vepu580_h265_rdo_bias_cfg()
712 if (hw->skip_bias_en) { in vepu580_h265_rdo_bias_cfg()
713 bias = h265e_mode_bias[hw->skip_bias]; in vepu580_h265_rdo_bias_cfg()
716 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = hw->skip_sad < 24 ? hw->skip_sad : 24; in vepu580_h265_rdo_bias_cfg()
717 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = hw->skip_sad < 4 ? hw->skip_sad : 4; in vepu580_h265_rdo_bias_cfg()
718 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = hw->skip_sad < 6 ? hw->skip_sad : 6; in vepu580_h265_rdo_bias_cfg()
719 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = hw->skip_sad; in vepu580_h265_rdo_bias_cfg()
739 bias = h265e_mode_bias[hw->mode_bias[0]]; in vepu580_h265_rdo_bias_cfg()
755 bias = h265e_mode_bias[hw->mode_bias[5]]; in vepu580_h265_rdo_bias_cfg()
771 if (hw->skip_bias_en) { in vepu580_h265_rdo_bias_cfg()
772 bias = h265e_mode_bias[hw->skip_bias]; in vepu580_h265_rdo_bias_cfg()
775 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = hw->skip_sad < 24 ? hw->skip_sad : 24; in vepu580_h265_rdo_bias_cfg()
776 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = hw->skip_sad < 4 ? hw->skip_sad : 4; in vepu580_h265_rdo_bias_cfg()
777 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = hw->skip_sad < 6 ? hw->skip_sad : 6; in vepu580_h265_rdo_bias_cfg()
778 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = hw->skip_sad; in vepu580_h265_rdo_bias_cfg()
794 bias = h265e_mode_bias[hw->mode_bias[1]]; in vepu580_h265_rdo_bias_cfg()
810 bias = h265e_mode_bias[hw->mode_bias[6]]; in vepu580_h265_rdo_bias_cfg()
826 if (hw->skip_bias_en) { in vepu580_h265_rdo_bias_cfg()
827 bias = h265e_mode_bias[hw->skip_bias]; in vepu580_h265_rdo_bias_cfg()
830 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = hw->skip_sad < 24 ? hw->skip_sad : 24; in vepu580_h265_rdo_bias_cfg()
831 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = hw->skip_sad < 24 ? hw->skip_sad : 24; in vepu580_h265_rdo_bias_cfg()
832 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = hw->skip_sad < 48 ? hw->skip_sad : 48; in vepu580_h265_rdo_bias_cfg()
833 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = hw->skip_sad; in vepu580_h265_rdo_bias_cfg()
849 bias = h265e_mode_bias[hw->mode_bias[2]]; in vepu580_h265_rdo_bias_cfg()
865 bias = h265e_mode_bias[hw->mode_bias[7]]; in vepu580_h265_rdo_bias_cfg()
881 if (hw->skip_bias_en) { in vepu580_h265_rdo_bias_cfg()
882 bias = h265e_mode_bias[hw->skip_bias]; in vepu580_h265_rdo_bias_cfg()
885 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd0 = hw->skip_sad < 24 ? hw->skip_sad : 24; in vepu580_h265_rdo_bias_cfg()
886 p_rdo_atf_skip->rdo_b_cime_thd0.cu_rdo_cime_thd1 = hw->skip_sad < 24 ? hw->skip_sad : 24; in vepu580_h265_rdo_bias_cfg()
887 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd2 = hw->skip_sad < 48 ? hw->skip_sad : 48; in vepu580_h265_rdo_bias_cfg()
888 p_rdo_atf_skip->rdo_b_cime_thd1.cu_rdo_cime_thd3 = hw->skip_sad; in vepu580_h265_rdo_bias_cfg()
1334 MppEncHwCfg *hw = &ctx->cfg->hw; in vepu580_h265_global_cfg_set() local
1342 vepu580_h265_rdo_bias_cfg(reg_rdo, hw); in vepu580_h265_global_cfg_set()
1349 rc_regs->aq_tthd[i] = hw->aq_thrd_i[i]; in vepu580_h265_global_cfg_set()
1350 rc_regs->aq_step[i] = hw->aq_step_i[i] & 0x3f; in vepu580_h265_global_cfg_set()
1355 rc_regs->aq_tthd[i] = hw->aq_thrd_p[i]; in vepu580_h265_global_cfg_set()
1356 rc_regs->aq_step[i] = hw->aq_step_p[i] & 0x3f; in vepu580_h265_global_cfg_set()
1558 MppEncHwCfg *hw = &cfg->cfg->hw; in hal_h265e_v580_init() local
1561 hw->qp_delta_row_i = 2; in hal_h265e_v580_init()
1562 hw->qp_delta_row = 2; in hal_h265e_v580_init()
1563 hw->qbias_i = 171; in hal_h265e_v580_init()
1564 hw->qbias_p = 85; in hal_h265e_v580_init()
1565 hw->qbias_en = 0; in hal_h265e_v580_init()
1567 memcpy(hw->aq_thrd_i, aq_thd_default, sizeof(hw->aq_thrd_i)); in hal_h265e_v580_init()
1568 memcpy(hw->aq_thrd_p, aq_thd_default, sizeof(hw->aq_thrd_p)); in hal_h265e_v580_init()
1569 memcpy(hw->aq_step_i, aq_qp_dealt_default, sizeof(hw->aq_step_i)); in hal_h265e_v580_init()
1570 memcpy(hw->aq_step_p, aq_qp_dealt_default, sizeof(hw->aq_step_p)); in hal_h265e_v580_init()
1572 for (j = 0; j < MPP_ARRAY_ELEMS(hw->mode_bias); j++) in hal_h265e_v580_init()
1573 hw->mode_bias[j] = 8; in hal_h265e_v580_init()
1575 hw->skip_sad = 8; in hal_h265e_v580_init()
1576 hw->skip_bias = 8; in hal_h265e_v580_init()
1898 MppEncHwCfg *hw = &cfg->hw; in vepu580_h265_set_rc_regs() local
1929 hw->qp_delta_row_i : hw->qp_delta_row; in vepu580_h265_set_rc_regs()