Lines Matching refs:frm
164 Vepu580H265eFrmCfg *frm; member
1408 Vepu580H265eFrmCfg *frm = ctx->frms[i]; in hal_h265e_v580_deinit() local
1411 if (!frm) in hal_h265e_v580_deinit()
1415 MPP_FREE(frm->regs_set[j]); in hal_h265e_v580_deinit()
1416 MPP_FREE(frm->regs_ret[j]); in hal_h265e_v580_deinit()
1420 if (frm->hw_tile_buf[j]) { in hal_h265e_v580_deinit()
1421 mpp_buffer_put(frm->hw_tile_buf[j]); in hal_h265e_v580_deinit()
1422 frm->hw_tile_buf[j] = NULL; in hal_h265e_v580_deinit()
1427 if (frm->hw_tile_stream[j]) { in hal_h265e_v580_deinit()
1428 mpp_buffer_put(frm->hw_tile_stream[j]); in hal_h265e_v580_deinit()
1429 frm->hw_tile_stream[j] = NULL; in hal_h265e_v580_deinit()
1433 if (frm->roi_base_cfg_buf) { in hal_h265e_v580_deinit()
1434 mpp_buffer_put(frm->roi_base_cfg_buf); in hal_h265e_v580_deinit()
1435 frm->roi_base_cfg_buf = NULL; in hal_h265e_v580_deinit()
1436 frm->roi_base_buf_size = 0; in hal_h265e_v580_deinit()
1439 MPP_FREE(frm->roi_base_cfg_sw_buf); in hal_h265e_v580_deinit()
1441 if (frm->reg_cfg) { in hal_h265e_v580_deinit()
1442 mpp_dev_multi_offset_deinit(frm->reg_cfg); in hal_h265e_v580_deinit()
1443 frm->reg_cfg = NULL; in hal_h265e_v580_deinit()
1640 if (task->rc_task->frm.use_pass1) in vepu580_h265_set_patch_info()
1758 Vepu580H265eFrmCfg *frm = ctx->frm; in setup_intra_refresh() local
1759 H265eV580RegSet *regs = frm->regs_set[0]; in setup_intra_refresh()
1765 MppEncROICfg2 *external_roi_cfg = (MppEncROICfg2 *)frm->roi_data; in setup_intra_refresh()
1779 if (frm->roi_data) { in setup_intra_refresh()
1783 if (frm->roi_base_buf_size < roi_base_cfg_buf_size) { in setup_intra_refresh()
1786 if (frm->roi_base_cfg_buf) in setup_intra_refresh()
1787 mpp_buffer_put(frm->roi_base_cfg_buf); in setup_intra_refresh()
1788 MPP_FREE(frm->roi_base_cfg_sw_buf); in setup_intra_refresh()
1789 frm->roi_base_cfg_sw_buf = mpp_malloc(RK_U8, roi_base_cfg_buf_size); in setup_intra_refresh()
1790 mpp_buffer_get(ctx->roi_grp, &frm->roi_base_cfg_buf, roi_base_cfg_buf_size); in setup_intra_refresh()
1792 roi_base_cfg_hw_ptr = mpp_buffer_get_ptr(frm->roi_base_cfg_buf); in setup_intra_refresh()
1793 roi_base_cfg_buf_fd = mpp_buffer_get_fd(frm->roi_base_cfg_buf); in setup_intra_refresh()
1796 frm->roi_base_buf_size = roi_base_cfg_buf_size; in setup_intra_refresh()
1798 memset(frm->roi_base_cfg_sw_buf, 0, roi_base_cfg_buf_size); in setup_intra_refresh()
1806 RK_U8 *ptr = frm->roi_base_cfg_sw_buf; in setup_intra_refresh()
1820 memcpy(roi_base_cfg_hw_ptr, frm->roi_base_cfg_sw_buf, roi_base_cfg_buf_size); in setup_intra_refresh()
1829 mpp_buffer_sync_end(frm->roi_base_cfg_buf); in setup_intra_refresh()
1839 Vepu580H265eFrmCfg *frm = ctx->frm; in vepu580_h265_set_roi_regs() local
1842 if (frm->roi_data) { in vepu580_h265_set_roi_regs()
1850 MppEncROICfg2 *cfg = (MppEncROICfg2 *)frm->roi_data; in vepu580_h265_set_roi_regs()
2289 Vepu580H265eFrmCfg *frm = ctx->frm; in setup_vepu580_dual_core() local
2290 H265eV580RegSet *regs = frm->regs_set[0]; in setup_vepu580_dual_core()
2295 if (frm->frame_type == INTRA_FRAME) { in setup_vepu580_dual_core()
2447 Vepu580H265eFrmCfg *frm = ctx->frm; in vepu580_h265_set_hw_address() local
2448 hevc_vepu580_base *regs = &frm->regs_set[0]->reg_base; in vepu580_h265_set_hw_address()
2459 recon_buf = hal_bufs_get_buf(ctx->dpb_bufs, frm->hal_curr_idx); in vepu580_h265_set_hw_address()
2460 ref_buf = hal_bufs_get_buf(ctx->dpb_bufs, frm->hal_refr_idx); in vepu580_h265_set_hw_address()
2466 mpp_dev_multi_offset_update(frm->reg_cfg, 164, ctx->fbc_header_len); in vepu580_h265_set_hw_address()
2475 mpp_dev_multi_offset_update(frm->reg_cfg, 166, ctx->fbc_header_len); in vepu580_h265_set_hw_address()
2488 if (NULL == frm->hw_tile_buf[i]) { in vepu580_h265_set_hw_address()
2489 mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_buf[i], max_tile_buf_size); in vepu580_h265_set_hw_address()
2493 if (NULL == frm->hw_tile_stream[0]) { in vepu580_h265_set_hw_address()
2494 mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_stream[0], ctx->frame_size / tile_num); in vepu580_h265_set_hw_address()
2498 if (NULL == frm->hw_tile_stream[1]) { in vepu580_h265_set_hw_address()
2499 mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_stream[1], ctx->frame_size / tile_num); in vepu580_h265_set_hw_address()
2501 if (NULL == frm->hw_tile_stream[2]) { in vepu580_h265_set_hw_address()
2502 mpp_buffer_get(ctx->tile_grp, &frm->hw_tile_stream[2], ctx->frame_size / tile_num); in vepu580_h265_set_hw_address()
2506 regs->reg0176_lpfw_addr = mpp_buffer_get_fd(frm->hw_tile_buf[0]); in vepu580_h265_set_hw_address()
2507 regs->reg0177_lpfr_addr = mpp_buffer_get_fd(frm->hw_tile_buf[1]); in vepu580_h265_set_hw_address()
2529 mpp_dev_multi_offset_update(frm->reg_cfg, 175, mpp_packet_get_length(task->packet)); in vepu580_h265_set_hw_address()
2530 mpp_dev_multi_offset_update(frm->reg_cfg, 172, mpp_buffer_get_size(enc_task->output)); in vepu580_h265_set_hw_address()
2539 Vepu580H265eFrmCfg *frm = ctx->frm; in vepu580_h265e_save_pass1_patch() local
2562 mpp_dev_multi_offset_update(frm->reg_cfg, 164, width_align * height_align); in vepu580_h265e_save_pass1_patch()
2573 Vepu580H265eFrmCfg *frm = ctx->frm; in vepu580_h265e_use_pass1_patch() local
2599 ret = mpp_dev_multi_offset_update(frm->reg_cfg, 161, frame_size); in vepu580_h265e_use_pass1_patch()
2604 ret = mpp_dev_multi_offset_update(frm->reg_cfg, 162, frame_size); in vepu580_h265e_use_pass1_patch()
2678 EncFrmStatus *frm = &rc_task->frm; in hal_h265e_v580_gen_regs() local
2680 Vepu580H265eFrmCfg *frm_cfg = ctx->frm; in hal_h265e_v580_gen_regs()
2786 vepu580_set_osd(&ctx->frm->osd_cfg); in hal_h265e_v580_gen_regs()
2789 if (frm->is_i_refresh) in hal_h265e_v580_gen_regs()
2790 setup_intra_refresh(ctx, frm->seq_idx % ctx->cfg->rc.gop); in hal_h265e_v580_gen_regs()
2864 Vepu580H265eFrmCfg *frm = ctx->frm; in hal_h265e_v580_start() local
2885 H265eV580RegSet *hw_regs = frm->regs_set[k]; in hal_h265e_v580_start()
2887 H265eV580StatusElem *reg_out = frm->regs_ret[k]; in hal_h265e_v580_start()
2891 frm->regs_set[k] = hw_regs; in hal_h265e_v580_start()
2895 frm->regs_ret[k] = reg_out; in hal_h265e_v580_start()
2901 memcpy(hw_regs, frm->regs_set[0], sizeof(*hw_regs)); in hal_h265e_v580_start()
2906 vepu580_h265_set_patch_info(frm->reg_cfg, syn, (VepuFmt)fmt->format, enc_task); in hal_h265e_v580_start()
2913 reg_base->reg0176_lpfw_addr = mpp_buffer_get_fd(frm->hw_tile_buf[k]); in hal_h265e_v580_start()
2914 reg_base->reg0177_lpfr_addr = mpp_buffer_get_fd(frm->hw_tile_buf[k - 1]); in hal_h265e_v580_start()
2922 mpp_dev_multi_offset_update(frm->reg_cfg, 175, offset); in hal_h265e_v580_start()
2923 … mpp_dev_multi_offset_update(frm->reg_cfg, 172, mpp_buffer_get_size(enc_task->output)); in hal_h265e_v580_start()
2925 reg_base->reg0172_bsbt_addr = mpp_buffer_get_fd(frm->hw_tile_stream[k - 1]); in hal_h265e_v580_start()
2931 mpp_dev_multi_offset_update(frm->reg_cfg, 175, 0); in hal_h265e_v580_start()
2932 … mpp_dev_multi_offset_update(frm->reg_cfg, 172, mpp_buffer_get_size(frm->hw_tile_stream[k - 1])); in hal_h265e_v580_start()
2937 mpp_dev_multi_offset_update(frm->reg_cfg, 166, offset); in hal_h265e_v580_start()
2938 mpp_dev_multi_offset_update(frm->reg_cfg, 164, offset); in hal_h265e_v580_start()
2941 if (enc_task->rc_task->frm.save_pass1) in hal_h265e_v580_start()
2944 if (enc_task->rc_task->frm.use_pass1) in hal_h265e_v580_start()
2949 mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_OFFS, frm->reg_cfg); in hal_h265e_v580_start()
2953 Vepu580H265Fbk *fb = &frm->feedback; in hal_h265e_v580_start()
2991 Vepu580H265eFrmCfg *frm = ctx->frms[enc_task->flags.reg_idx]; in vepu580_h265_set_feedback() local
2992 Vepu580H265Fbk *fb = &frm->feedback; in vepu580_h265_set_feedback()
2999 H265eV580StatusElem *elem = frm->regs_ret[index]; in vepu580_h265_set_feedback()
3186 Vepu580H265eFrmCfg *frm = ctx->frms[task_idx]; in hal_h265e_v580_wait() local
3197 if (enc_task->rc_task->frm.save_pass1) in hal_h265e_v580_wait()
3210 H265eV580RegSet *regs = frm->regs_set[0]; in hal_h265e_v580_wait()
3233 MppBuffer buf = frm->hw_tile_stream[finish_cnt - 1]; in hal_h265e_v580_wait()
3273 H265eV580StatusElem *elem = frm->regs_ret[0]; in hal_h265e_v580_wait()
3274 H265eV580RegSet *regs = frm->regs_set[0]; in hal_h265e_v580_wait()
3289 H265eV580StatusElem *elem_ret = frm->regs_ret[i]; in hal_h265e_v580_wait()
3319 EncFrmStatus *frm_status = &task->rc_task->frm; in hal_h265e_v580_get_task()
3342 ctx->frm = frm_cfg; in hal_h265e_v580_get_task()
3366 frm_cfg = ctx->frm; in hal_h265e_v580_get_task()
3387 Vepu580H265eFrmCfg *frm = ctx->frms[task_idx]; in hal_h265e_v580_ret_task() local
3388 Vepu580H265Fbk *fb = &frm->feedback; in hal_h265e_v580_ret_task()
3403 MppBuffer buf = frm->hw_tile_stream[i - 1]; in hal_h265e_v580_ret_task()
3447 h265e_dpb_hal_end(ctx->dpb, frm->hal_curr_idx); in hal_h265e_v580_ret_task()
3448 h265e_dpb_hal_end(ctx->dpb, frm->hal_refr_idx); in hal_h265e_v580_ret_task()