2999     H265eV580StatusElem *elem = frm->regs_ret[index];  in vepu580_h265_set_feedback()  local
3000     RK_U32 hw_status = elem->hw_status;  in vepu580_h265_set_feedback()
3002     fb->qp_sum += elem->st.qp_sum;  in vepu580_h265_set_feedback()
3004     fb->out_strm_size += elem->st.bs_lgth_l32;  in vepu580_h265_set_feedback()
3006     fb->sse_sum += (RK_S64)(elem->st.sse_h32 << 16) +  in vepu580_h265_set_feedback()
3007                    (elem->st.st_sse_bsl.sse_l16 & 0xffff);  in vepu580_h265_set_feedback()
3038     fb->st_madi += elem->st.madi;  in vepu580_h265_set_feedback()
3039     fb->st_madp += elem->st.madp;  in vepu580_h265_set_feedback()
3040     fb->st_mb_num += elem->st.st_bnum_b16.num_b16;  in vepu580_h265_set_feedback()
3041     fb->st_ctu_num += elem->st.st_bnum_cme.num_ctu;  in vepu580_h265_set_feedback()
3043     fb->st_lvl64_inter_num += elem->st.st_pnum_p64.pnum_p64;  in vepu580_h265_set_feedback()
3044     fb->st_lvl32_inter_num += elem->st.st_pnum_p32.pnum_p32;  in vepu580_h265_set_feedback()
3045     fb->st_lvl32_intra_num += elem->st.st_pnum_i32.pnum_i32;  in vepu580_h265_set_feedback()
3046     fb->st_lvl16_inter_num += elem->st.st_pnum_p16.pnum_p16;  in vepu580_h265_set_feedback()
3047     fb->st_lvl16_intra_num += elem->st.st_pnum_i16.pnum_i16;  in vepu580_h265_set_feedback()
3048     fb->st_lvl8_inter_num  += elem->st.st_pnum_p8.pnum_p8;  in vepu580_h265_set_feedback()
3049     fb->st_lvl8_intra_num  += elem->st.st_pnum_i8.pnum_i8;  in vepu580_h265_set_feedback()
3050     fb->st_lvl4_intra_num  += elem->st.st_pnum_i4.pnum_i4;  in vepu580_h265_set_feedback()
3051     memcpy(&fb->st_cu_num_qp[0], &elem->st.st_b8_qp0, 52 * sizeof(RK_U32));  in vepu580_h265_set_feedback()
3273         H265eV580StatusElem *elem = frm->regs_ret[0];  in hal_h265e_v580_wait()  local
3307             mpp_err_f("poll cmd failed %d status %d \n", ret, elem->hw_status);  in hal_h265e_v580_wait()