936     H265eVepu510Param *reg_param = &regs->reg_param;  in vepu510_h265_global_cfg_set()  local
945     memcpy(&reg_param->pprd_lamb_satd_0_51[0], lamd_satd_qp_510, sizeof(lamd_satd_qp));  in vepu510_h265_global_cfg_set()
948         reg_param->iprd_lamb_satd_ofst.lambda_satd_offset = 11;  in vepu510_h265_global_cfg_set()
950         memcpy(&reg_param->rdo_wgta_qp_grpa_0_51[0],  in vepu510_h265_global_cfg_set()
953         reg_param->iprd_lamb_satd_ofst.lambda_satd_offset = 11;  in vepu510_h265_global_cfg_set()
955         memcpy(&reg_param->rdo_wgta_qp_grpa_0_51[0],  in vepu510_h265_global_cfg_set()
959     reg_param->qnt_bias_comb.qnt_f_bias_i = 171;  in vepu510_h265_global_cfg_set()
960     reg_param->qnt_bias_comb.qnt_f_bias_p = 85;  in vepu510_h265_global_cfg_set()
962         reg_param->qnt_bias_comb.qnt_f_bias_i = hw->qbias_i;  in vepu510_h265_global_cfg_set()
963         reg_param->qnt_bias_comb.qnt_f_bias_p = hw->qbias_p;  in vepu510_h265_global_cfg_set()
965         reg_param->qnt_bias_comb.qnt_f_bias_i = 144;  in vepu510_h265_global_cfg_set()
970         reg_param->me_sqi_comb.cime_pmv_num = 1;  in vepu510_h265_global_cfg_set()
971         reg_param->me_sqi_comb.cime_fuse   = 1;  in vepu510_h265_global_cfg_set()
972         reg_param->me_sqi_comb.itp_mode    = 1;  in vepu510_h265_global_cfg_set()
973         reg_param->me_sqi_comb.move_lambda = (sm == MPP_ENC_SCENE_MODE_IPC) ? 2 : 8;  in vepu510_h265_global_cfg_set()
974         reg_param->me_sqi_comb.rime_lvl_mrg     = 1;  in vepu510_h265_global_cfg_set()
975         reg_param->me_sqi_comb.rime_prelvl_en   = 3;  in vepu510_h265_global_cfg_set()
976         reg_param->me_sqi_comb.rime_prersu_en   = 0;  in vepu510_h265_global_cfg_set()
977         reg_param->cime_mvd_th_comb.cime_mvd_th0 = 8;  in vepu510_h265_global_cfg_set()
978         reg_param->cime_mvd_th_comb.cime_mvd_th1 = 20;  in vepu510_h265_global_cfg_set()
979         reg_param->cime_mvd_th_comb.cime_mvd_th2 = 32;  in vepu510_h265_global_cfg_set()
980         reg_param->cime_madp_th_comb.cime_madp_th = (sm == MPP_ENC_SCENE_MODE_IPC) ? 16 : 0;  in vepu510_h265_global_cfg_set()
983             reg_param->cime_multi_comb.cime_multi0 = 8;  in vepu510_h265_global_cfg_set()
984             reg_param->cime_multi_comb.cime_multi1 = 12;  in vepu510_h265_global_cfg_set()
985             reg_param->cime_multi_comb.cime_multi2 = 16;  in vepu510_h265_global_cfg_set()
986             reg_param->cime_multi_comb.cime_multi3 = 20;  in vepu510_h265_global_cfg_set()
988             reg_param->cime_multi_comb.cime_multi0 = 4;  in vepu510_h265_global_cfg_set()
989             reg_param->cime_multi_comb.cime_multi1 = 4;  in vepu510_h265_global_cfg_set()
990             reg_param->cime_multi_comb.cime_multi2 = 4;  in vepu510_h265_global_cfg_set()
991             reg_param->cime_multi_comb.cime_multi3 = 4;  in vepu510_h265_global_cfg_set()
997         reg_param->rime_mvd_th_comb.rime_mvd_th0  = 1;  in vepu510_h265_global_cfg_set()
998         reg_param->rime_mvd_th_comb.rime_mvd_th1  = 2;  in vepu510_h265_global_cfg_set()
999         reg_param->rime_mvd_th_comb.fme_madp_th   = 0;  in vepu510_h265_global_cfg_set()
1000         reg_param->rime_madp_th_comb.rime_madp_th0 = 8;  in vepu510_h265_global_cfg_set()
1001         reg_param->rime_madp_th_comb.rime_madp_th1 = 16;  in vepu510_h265_global_cfg_set()
1002         reg_param->rime_multi_comb.rime_multi0 = 4;  in vepu510_h265_global_cfg_set()
1003         reg_param->rime_multi_comb.rime_multi1 = 8;  in vepu510_h265_global_cfg_set()
1004         reg_param->rime_multi_comb.rime_multi2 = 12;  in vepu510_h265_global_cfg_set()
1006         reg_param->rime_mvd_th_comb.rime_mvd_th0  = 0;  in vepu510_h265_global_cfg_set()
1007         reg_param->rime_mvd_th_comb.rime_mvd_th1  = 0;  in vepu510_h265_global_cfg_set()
1008         reg_param->rime_mvd_th_comb.fme_madp_th   = 30;  in vepu510_h265_global_cfg_set()
1009         reg_param->rime_madp_th_comb.rime_madp_th0 = 0;  in vepu510_h265_global_cfg_set()
1010         reg_param->rime_madp_th_comb.rime_madp_th1 = 0;  in vepu510_h265_global_cfg_set()
1011         reg_param->rime_multi_comb.rime_multi0 = 4;  in vepu510_h265_global_cfg_set()
1012         reg_param->rime_multi_comb.rime_multi1 = 4;  in vepu510_h265_global_cfg_set()
1013         reg_param->rime_multi_comb.rime_multi2 = 4;  in vepu510_h265_global_cfg_set()
1028         reg_param->cmv_st_th_comb.cmv_th0 = 64;  in vepu510_h265_global_cfg_set()
1029         reg_param->cmv_st_th_comb.cmv_th1 = 96;  in vepu510_h265_global_cfg_set()
1030         reg_param->cmv_st_th_comb.cmv_th2 = 128;  in vepu510_h265_global_cfg_set()
2150     cfg.reg =  &hw_regs->reg_param;  in hal_h265e_v510_start()
2161         regs = (RK_U32*)&hw_regs->reg_param;  in hal_h265e_v510_start()