1407     Vepu510ControlCfg *reg_ctl = &regs->reg_ctl;  in vepu510_h265_set_pp_regs()  local
1412     reg_ctl->dtrns_map.src_bus_edin = fmt->src_endian;  in vepu510_h265_set_pp_regs()
1719     Vepu510ControlCfg *reg_ctl = &regs->reg_ctl;  in vepu510_h265e_use_pass1_patch()  local
1727     reg_ctl->dtrns_map.src_bus_edin = fmt->src_endian;  in vepu510_h265e_use_pass1_patch()
1843         regs->reg_ctl.int_en.vslc_done_en = regs->reg_frm.common.enc_pic.slen_fifo ;  in setup_vepu510_split()
1866             regs->reg_ctl.int_en.vslc_done_en = 1;  in setup_vepu510_split()
1943     Vepu510ControlCfg *reg_ctl = &regs->reg_ctl;  in hal_h265e_v510_gen_regs()  local
1960     reg_ctl->enc_strt.lkt_num      = 0;  in hal_h265e_v510_gen_regs()
1961     reg_ctl->enc_strt.vepu_cmd     = ctx->enc_mode;  in hal_h265e_v510_gen_regs()
1962     reg_ctl->enc_clr.safe_clr      = 0x0;  in hal_h265e_v510_gen_regs()
1963     reg_ctl->enc_clr.force_clr     = 0x0;  in hal_h265e_v510_gen_regs()
1965     reg_ctl->int_en.enc_done_en        = 1;  in hal_h265e_v510_gen_regs()
1966     reg_ctl->int_en.lkt_node_done_en   = 1;  in hal_h265e_v510_gen_regs()
1967     reg_ctl->int_en.sclr_done_en       = 1;  in hal_h265e_v510_gen_regs()
1968     reg_ctl->int_en.vslc_done_en       = 0;  in hal_h265e_v510_gen_regs()
1969     reg_ctl->int_en.vbsf_oflw_en       = 1;  in hal_h265e_v510_gen_regs()
1970     reg_ctl->int_en.vbuf_lens_en       = 1;  in hal_h265e_v510_gen_regs()
1971     reg_ctl->int_en.enc_err_en         = 1;  in hal_h265e_v510_gen_regs()
1972     reg_ctl->int_en.vsrc_err_en        = 1;  in hal_h265e_v510_gen_regs()
1973     reg_ctl->int_en.wdg_en             = 1;  in hal_h265e_v510_gen_regs()
1974     reg_ctl->int_en.lkt_err_int_en     = 0;  in hal_h265e_v510_gen_regs()
1975     reg_ctl->int_en.lkt_err_stop_en    = 1;  in hal_h265e_v510_gen_regs()
1976     reg_ctl->int_en.lkt_force_stop_en  = 1;  in hal_h265e_v510_gen_regs()
1977     reg_ctl->int_en.jslc_done_en       = 1;  in hal_h265e_v510_gen_regs()
1978     reg_ctl->int_en.jbsf_oflw_en       = 1;  in hal_h265e_v510_gen_regs()
1979     reg_ctl->int_en.jbuf_lens_en       = 1;  in hal_h265e_v510_gen_regs()
1980     reg_ctl->int_en.dvbm_err_en        = 0;  in hal_h265e_v510_gen_regs()
1982     reg_ctl->dtrns_map.jpeg_bus_edin    = 0x0;  in hal_h265e_v510_gen_regs()
1983     reg_ctl->dtrns_map.src_bus_edin     = 0x0;  in hal_h265e_v510_gen_regs()
1984     reg_ctl->dtrns_map.meiw_bus_edin    = 0x0;  in hal_h265e_v510_gen_regs()
1985     reg_ctl->dtrns_map.bsw_bus_edin     = 0x7;  in hal_h265e_v510_gen_regs()
1986     reg_ctl->dtrns_map.lktw_bus_edin    = 0x0;  in hal_h265e_v510_gen_regs()
1987     reg_ctl->dtrns_map.rec_nfbc_bus_edin   = 0x0;  in hal_h265e_v510_gen_regs()
1989     reg_ctl->dtrns_cfg.axi_brsp_cke     = 0x0;  in hal_h265e_v510_gen_regs()
1990     reg_ctl->enc_wdg.vs_load_thd        = 0;  in hal_h265e_v510_gen_regs()
1992     reg_ctl->opt_strg.cke                = 1;  in hal_h265e_v510_gen_regs()
1993     reg_ctl->opt_strg.resetn_hw_en       = 1;  in hal_h265e_v510_gen_regs()
1994     reg_ctl->opt_strg.rfpr_err_e         = 1;  in hal_h265e_v510_gen_regs()
2096     cfg.reg = (RK_U32*)&hw_regs->reg_ctl;  in hal_h265e_v510_start()
2107         regs = (RK_U32*)&hw_regs->reg_ctl;  in hal_h265e_v510_start()
2301     if (regs->reg_ctl.int_sta.lkt_node_done_sta)  in hal_h265e_vepu510_status_check()
2304     if (regs->reg_ctl.int_sta.enc_done_sta)  in hal_h265e_vepu510_status_check()
2307     if (regs->reg_ctl.int_sta.vslc_done_sta)  in hal_h265e_vepu510_status_check()
2310     if (regs->reg_ctl.int_sta.sclr_done_sta)  in hal_h265e_vepu510_status_check()
2313     if (regs->reg_ctl.int_sta.vbsf_oflw_sta) {  in hal_h265e_vepu510_status_check()
2318     if (regs->reg_ctl.int_sta.vbuf_lens_sta) {  in hal_h265e_vepu510_status_check()
2323     if (regs->reg_ctl.int_sta.enc_err_sta) {  in hal_h265e_vepu510_status_check()
2328     if (regs->reg_ctl.int_sta.wdg_sta) {  in hal_h265e_vepu510_status_check()