Lines Matching refs:rdo_cfg
1883 RK_U32 scl_lst_sel = regs->reg_frm.rdo_cfg.scl_lst_sel; in vepu510_h265_set_scaling_list()
2024 reg_frm->rdo_cfg.chrm_spcl = 0; in hal_h265e_v510_gen_regs()
2025 reg_frm->rdo_cfg.cu_inter_e = 0xdb; in hal_h265e_v510_gen_regs()
2026 reg_frm->rdo_cfg.lambda_qp_use_avg_cu16_flag = (sm == MPP_ENC_SCENE_MODE_IPC); in hal_h265e_v510_gen_regs()
2027 reg_frm->rdo_cfg.yuvskip_calc_en = 1; in hal_h265e_v510_gen_regs()
2028 reg_frm->rdo_cfg.atf_e = (sm == MPP_ENC_SCENE_MODE_IPC); in hal_h265e_v510_gen_regs()
2029 reg_frm->rdo_cfg.atr_e = 1; in hal_h265e_v510_gen_regs()
2032 reg_frm->rdo_cfg.ltm_col = 0; in hal_h265e_v510_gen_regs()
2033 reg_frm->rdo_cfg.ltm_idx0l0 = 1; in hal_h265e_v510_gen_regs()
2035 reg_frm->rdo_cfg.ltm_col = 0; in hal_h265e_v510_gen_regs()
2036 reg_frm->rdo_cfg.ltm_idx0l0 = 0; in hal_h265e_v510_gen_regs()
2039 reg_frm->rdo_cfg.ccwa_e = 1; in hal_h265e_v510_gen_regs()
2040 reg_frm->rdo_cfg.scl_lst_sel = syn->pp.scaling_list_enabled_flag; in hal_h265e_v510_gen_regs()