40     RK_U32 hw_status; /* 0:corret, 1:error */  member
2193     cfg1.reg = &reg_out->hw_status;  in hal_h265e_v510_start()
2230     RK_U32 hw_status = elem->hw_status;  in vepu510_h265_set_feedback()  local
2239     fb->hw_status = hw_status;  in vepu510_h265_set_feedback()
2240     hal_h265e_dbg_detail("hw_status: 0x%08x", hw_status);  in vepu510_h265_set_feedback()
2241     if (hw_status & RKV_ENC_INT_LINKTABLE_FINISH)  in vepu510_h265_set_feedback()
2244     if (hw_status & RKV_ENC_INT_ONE_FRAME_FINISH)  in vepu510_h265_set_feedback()
2247     if (hw_status & RKV_ENC_INT_ONE_SLICE_FINISH)  in vepu510_h265_set_feedback()
2250     if (hw_status & RKV_ENC_INT_SAFE_CLEAR_FINISH)  in vepu510_h265_set_feedback()
2253     if (hw_status & RKV_ENC_INT_BIT_STREAM_OVERFLOW)  in vepu510_h265_set_feedback()
2256     if (hw_status & RKV_ENC_INT_BUS_WRITE_FULL)  in vepu510_h265_set_feedback()
2259     if (hw_status & RKV_ENC_INT_BUS_WRITE_ERROR)  in vepu510_h265_set_feedback()
2262     if (hw_status & RKV_ENC_INT_BUS_READ_ERROR)  in vepu510_h265_set_feedback()
2265     if (hw_status & RKV_ENC_INT_TIMEOUT_ERROR)  in vepu510_h265_set_feedback()
2475         mpp_err_f("poll cmd failed %d status %d \n", ret, elem->hw_status);  in hal_h265e_v510_wait()