885         MppDevRegWrCfg wr_cfg;  in vdpu384a_h264d_start()  local
888         wr_cfg.reg = &regs->ctrl_regs;  in vdpu384a_h264d_start()
889         wr_cfg.size = sizeof(regs->ctrl_regs);  in vdpu384a_h264d_start()
890         wr_cfg.offset = OFFSET_CTRL_REGS;  in vdpu384a_h264d_start()
891         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu384a_h264d_start()
897         wr_cfg.reg = &regs->common_addr;  in vdpu384a_h264d_start()
898         wr_cfg.size = sizeof(regs->common_addr);  in vdpu384a_h264d_start()
899         wr_cfg.offset = OFFSET_COMMON_ADDR_REGS;  in vdpu384a_h264d_start()
900         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu384a_h264d_start()
906         wr_cfg.reg = &regs->h264d_paras;  in vdpu384a_h264d_start()
907         wr_cfg.size = sizeof(regs->h264d_paras);  in vdpu384a_h264d_start()
908         wr_cfg.offset = OFFSET_CODEC_PARAS_REGS;  in vdpu384a_h264d_start()
909         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu384a_h264d_start()
915         wr_cfg.reg = &regs->h264d_addrs;  in vdpu384a_h264d_start()
916         wr_cfg.size = sizeof(regs->h264d_addrs);  in vdpu384a_h264d_start()
917         wr_cfg.offset = OFFSET_CODEC_ADDR_REGS;  in vdpu384a_h264d_start()
918         ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg);  in vdpu384a_h264d_start()