Lines Matching refs:reg_ctx
540 Vdpu382H264dRegCtx *ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in set_registers()
667 Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in set_registers() local
673 regs->h264d_addr.cabactbl_base = reg_ctx->bufs_fd; in set_registers()
674 mpp_dev_set_reg_offset(p_hal->dev, 197, reg_ctx->offset_cabac); in set_registers()
736 MEM_CHECK(ret, p_hal->reg_ctx = mpp_calloc_size(void, sizeof(Vdpu382H264dRegCtx))); in vdpu382_h264d_init()
737 Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in vdpu382_h264d_init() local
742 FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, ®_ctx->bufs, in vdpu382_h264d_init()
744 reg_ctx->bufs_fd = mpp_buffer_get_fd(reg_ctx->bufs); in vdpu382_h264d_init()
745 reg_ctx->bufs_ptr = mpp_buffer_get_ptr(reg_ctx->bufs); in vdpu382_h264d_init()
746 reg_ctx->offset_cabac = VDPU382_CABAC_TAB_OFFSET; in vdpu382_h264d_init()
747 reg_ctx->offset_errinfo = VDPU382_ERROR_INFO_OFFSET; in vdpu382_h264d_init()
749 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu382H264dRegSet, 1); in vdpu382_h264d_init()
750 init_common_regs(reg_ctx->reg_buf[i].regs); in vdpu382_h264d_init()
751 reg_ctx->offset_spspps[i] = VDPU382_SPSPPS_OFFSET(i); in vdpu382_h264d_init()
752 reg_ctx->offset_rps[i] = VDPU382_RPS_OFFSET(i); in vdpu382_h264d_init()
753 reg_ctx->offset_sclst[i] = VDPU382_SCALING_LIST_OFFSET(i); in vdpu382_h264d_init()
757 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu382_h264d_init()
758 reg_ctx->spspps_offset = reg_ctx->offset_spspps[0]; in vdpu382_h264d_init()
759 reg_ctx->rps_offset = reg_ctx->offset_rps[0]; in vdpu382_h264d_init()
760 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu382_h264d_init()
764 memcpy((char *)reg_ctx->bufs_ptr + reg_ctx->offset_cabac, in vdpu382_h264d_init()
775 reg_ctx->err_ref_hack = cap->ctrl_cmd > MPP_CMD_SET_ERR_REF_HACK; in vdpu382_h264d_init()
776 if (reg_ctx->err_ref_hack) in vdpu382_h264d_init()
777 mpp_dev_ioctl(p_hal->dev, MPP_DEV_SET_ERR_REF_HACK, ®_ctx->err_ref_hack); in vdpu382_h264d_init()
795 Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in vdpu382_h264d_deinit() local
798 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu382_h264d_deinit()
800 mpp_buffer_put(reg_ctx->bufs); in vdpu382_h264d_deinit()
803 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu382_h264d_deinit()
805 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->rcb_buf) : 1; in vdpu382_h264d_deinit()
807 if (reg_ctx->rcb_buf[i]) { in vdpu382_h264d_deinit()
808 mpp_buffer_put(reg_ctx->rcb_buf[i]); in vdpu382_h264d_deinit()
809 reg_ctx->rcb_buf[i] = NULL; in vdpu382_h264d_deinit()
818 MPP_FREE(p_hal->reg_ctx); in vdpu382_h264d_deinit()
890 Vdpu382H264dRegCtx *ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in hal_h264d_rcb_info_update()
956 Vdpu382H264dRegCtx *ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in vdpu382_h264d_gen_regs()
1069 Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in vdpu382_h264d_start() local
1071 reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu382_h264d_start()
1072 reg_ctx->regs; in vdpu382_h264d_start()
1159 vdpu382_set_rcbinfo(dev, reg_ctx->rcb_info); in vdpu382_h264d_start()
1175 Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in vdpu382_h264_get_ref_used() local
1177 reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu382_h264_get_ref_used()
1178 reg_ctx->regs; in vdpu382_h264_get_ref_used()
1185 H264dRkvBuf_t *cur_buf = ®_ctx->reg_buf[task->dec.reg_index]; in vdpu382_h264_get_ref_used()
1232 Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx; in vdpu382_h264d_wait() local
1234 reg_ctx->reg_buf[index].regs : in vdpu382_h264d_wait()
1235 reg_ctx->regs; in vdpu382_h264d_wait()
1254 ref_used = reg_ctx->err_ref_hack ? 0 : vdpu382_h264_get_ref_used(hal, task); in vdpu382_h264d_wait()
1270 reg_ctx->reg_buf[index].valid = 0; in vdpu382_h264d_wait()