356 static MPP_RET prepare_spspps(H264dHalCtx_t *p_hal, RK_U64 *data, RK_U32 len)  in prepare_spspps()  argument
360     DXVA_PicParams_H264_MVC *pp = p_hal->pp;  in prepare_spspps()
366     if (!p_hal->fast_mode && !pp->spspps_update) {  in prepare_spspps()
451 static MPP_RET prepare_framerps(H264dHalCtx_t *p_hal, RK_U64 *data, RK_U32 len)  in prepare_framerps()  argument
461     DXVA_PicParams_H264_MVC *pp = p_hal->pp;  in prepare_framerps()
490         dpb_valid = (p_hal->slice_long[0].RefPicList[0][i].bPicEntry == 0xff) ? 0 : 1;  in prepare_framerps()
491         dpb_idx = dpb_valid ? p_hal->slice_long[0].RefPicList[0][i].Index7Bits : 0;  in prepare_framerps()
492         bottom_flag = dpb_valid ? p_hal->slice_long[0].RefPicList[0][i].AssociatedFlag : 0;  in prepare_framerps()
502             dpb_valid = (p_hal->slice_long[0].RefPicList[j][i].bPicEntry == 0xff) ? 0 : 1;  in prepare_framerps()
503             dpb_idx = dpb_valid ? p_hal->slice_long[0].RefPicList[j][i].Index7Bits : 0;  in prepare_framerps()
504             bottom_flag = dpb_valid ? p_hal->slice_long[0].RefPicList[j][i].AssociatedFlag : 0;  in prepare_framerps()
517 static MPP_RET prepare_scanlist(H264dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)  in prepare_scanlist()  argument
521     if (p_hal->pp->scaleing_list_enable_flag) {  in prepare_scanlist()
524                 data[n++] = p_hal->qm->bScalingLists4x4[i][j];  in prepare_scanlist()
529                 data[n++] = p_hal->qm->bScalingLists8x8[i][j];  in prepare_scanlist()
538 static MPP_RET set_registers(H264dHalCtx_t *p_hal, Vdpu382H264dRegSet *regs, HalTaskInfo *task)  in set_registers()  argument
540     Vdpu382H264dRegCtx *ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in set_registers()
541     DXVA_PicParams_H264_MVC *pp = p_hal->pp;  in set_registers()
547     common->reg016_str_len = p_hal->strm_len;  in set_registers()
548     common->reg013.cur_pic_is_idr = p_hal->slice_long->idr_flag;  in set_registers()
550         (p_hal->hw_info && p_hal->hw_info->cap_colmv_compress && pp->frame_mbs_only_flag) ? 1 : 0;  in set_registers()
561         mpp_buf_slot_get_prop(p_hal->frame_slots, pp->CurrPic.Index7Bits, SLOT_FRAME_PTR, &mframe);  in set_registers()
588         mpp_buf_slot_get_prop(p_hal->frame_slots, pp->CurrPic.Index7Bits, SLOT_BUFFER, &mbuffer);  in set_registers()
593         mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, pp->CurrPic.Index7Bits);  in set_registers()
636             mpp_buf_slot_get_prop(p_hal->frame_slots, ref_index, SLOT_BUFFER, &mbuffer);  in set_registers()
637             mpp_buf_slot_get_prop(p_hal->frame_slots, ref_index, SLOT_FRAME_PTR, &mframe);  in set_registers()
660             mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, ref_index);  in set_registers()
667         Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in set_registers()
669         mpp_buf_slot_get_prop(p_hal->packet_slots, task->dec.input, SLOT_BUFFER, &mbuffer);  in set_registers()
674         mpp_dev_set_reg_offset(p_hal->dev, 197, reg_ctx->offset_cabac);  in set_registers()
732     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_init()  local
734     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_init()
736     MEM_CHECK(ret, p_hal->reg_ctx = mpp_calloc_size(void, sizeof(Vdpu382H264dRegCtx)));  in vdpu382_h264d_init()
737     Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in vdpu382_h264d_init()
738     RK_U32 max_cnt = p_hal->fast_mode ? VDPU382_FAST_REG_SET_CNT : 1;  in vdpu382_h264d_init()
742     FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, &reg_ctx->bufs,  in vdpu382_h264d_init()
756     if (!p_hal->fast_mode) {  in vdpu382_h264d_init()
767     mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align);  in vdpu382_h264d_init()
768     mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align);  in vdpu382_h264d_init()
769     mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align);  in vdpu382_h264d_init()
777             mpp_dev_ioctl(p_hal->dev, MPP_DEV_SET_ERR_REF_HACK, &reg_ctx->err_ref_hack);  in vdpu382_h264d_init()
794     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_deinit()  local
795     Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in vdpu382_h264d_deinit()
798     RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1;  in vdpu382_h264d_deinit()
805     loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->rcb_buf) : 1;  in vdpu382_h264d_deinit()
813     if (p_hal->cmv_bufs) {  in vdpu382_h264d_deinit()
814         hal_bufs_deinit(p_hal->cmv_bufs);  in vdpu382_h264d_deinit()
815         p_hal->cmv_bufs = NULL;  in vdpu382_h264d_deinit()
818     MPP_FREE(p_hal->reg_ctx);  in vdpu382_h264d_deinit()
823 static void h264d_refine_rcb_size(H264dHalCtx_t *p_hal, Vdpu382RcbInfo *rcb_info,  in h264d_refine_rcb_size()  argument
828     RK_U32 mbaff = p_hal->pp->MbaffFrameFlag;  in h264d_refine_rcb_size()
829     RK_U32 bit_depth = p_hal->pp->bit_depth_luma_minus8 + 8;  in h264d_refine_rcb_size()
830     RK_U32 chroma_format_idc = p_hal->pp->chroma_format_idc;  in h264d_refine_rcb_size()
886     H264dHalCtx_t *p_hal = (H264dHalCtx_t*)hal;  in hal_h264d_rcb_info_update()  local
887     RK_U32 mbaff = p_hal->pp->MbaffFrameFlag;  in hal_h264d_rcb_info_update()
888     RK_U32 bit_depth = p_hal->pp->bit_depth_luma_minus8 + 8;  in hal_h264d_rcb_info_update()
889     RK_U32 chroma_format_idc = p_hal->pp->chroma_format_idc;  in hal_h264d_rcb_info_update()
890     Vdpu382H264dRegCtx *ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in hal_h264d_rcb_info_update()
891     RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64);  in hal_h264d_rcb_info_update()
892     RK_S32 height = MPP_ALIGN((p_hal->pp->wFrameHeightInMbsMinus1 + 1) << 4, 64);  in hal_h264d_rcb_info_update()
900         RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1;  in hal_h264d_rcb_info_update()
911             mpp_buffer_get(p_hal->buf_group, &rcb_buf, ctx->rcb_buf_size);  in hal_h264d_rcb_info_update()
924     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_setup_colmv_buf()  local
925     RK_S32 width = MPP_ALIGN((p_hal->pp->wFrameWidthInMbsMinus1 + 1) << 4, 64);  in vdpu382_h264d_setup_colmv_buf()
926     RK_S32 height = MPP_ALIGN((p_hal->pp->wFrameHeightInMbsMinus1 + 1) << 4, 64);  in vdpu382_h264d_setup_colmv_buf()
931     if (p_hal->cmv_bufs == NULL || p_hal->mv_size < mv_size) {  in vdpu382_h264d_setup_colmv_buf()
934         if (p_hal->cmv_bufs) {  in vdpu382_h264d_setup_colmv_buf()
935             hal_bufs_deinit(p_hal->cmv_bufs);  in vdpu382_h264d_setup_colmv_buf()
936             p_hal->cmv_bufs = NULL;  in vdpu382_h264d_setup_colmv_buf()
939         hal_bufs_init(&p_hal->cmv_bufs);  in vdpu382_h264d_setup_colmv_buf()
940         if (p_hal->cmv_bufs == NULL) {  in vdpu382_h264d_setup_colmv_buf()
944         p_hal->mv_size = mv_size;  in vdpu382_h264d_setup_colmv_buf()
945         p_hal->mv_count = mpp_buf_slot_get_count(p_hal->frame_slots);  in vdpu382_h264d_setup_colmv_buf()
946         hal_bufs_setup(p_hal->cmv_bufs, p_hal->mv_count, 1, &size);  in vdpu382_h264d_setup_colmv_buf()
955     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_gen_regs()  local
956     Vdpu382H264dRegCtx *ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in vdpu382_h264d_gen_regs()
958     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_gen_regs()
961         (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {  in vdpu382_h264d_gen_regs()
966     if (p_hal->fast_mode) {  in vdpu382_h264d_gen_regs()
983     prepare_spspps(p_hal, (RK_U64 *)&ctx->spspps, sizeof(ctx->spspps));  in vdpu382_h264d_gen_regs()
984     prepare_framerps(p_hal, (RK_U64 *)&ctx->rps, sizeof(ctx->rps));  in vdpu382_h264d_gen_regs()
985     prepare_scanlist(p_hal, ctx->sclst, sizeof(ctx->sclst));  in vdpu382_h264d_gen_regs()
986     set_registers(p_hal, regs, task);  in vdpu382_h264d_gen_regs()
990     if (!p_hal->fast_mode && !p_hal->pp->spspps_update) {  in vdpu382_h264d_gen_regs()
1006     mpp_dev_set_reg_offset(p_hal->dev, 161, ctx->spspps_offset);  in vdpu382_h264d_gen_regs()
1010     mpp_dev_set_reg_offset(p_hal->dev, 163, ctx->rps_offset);  in vdpu382_h264d_gen_regs()
1013     if (p_hal->pp->scaleing_list_enable_flag) {  in vdpu382_h264d_gen_regs()
1016         mpp_dev_set_reg_offset(p_hal->dev, 180, ctx->sclst_offset);  in vdpu382_h264d_gen_regs()
1021     hal_h264d_rcb_info_update(p_hal, regs);  in vdpu382_h264d_gen_regs()
1022     vdpu382_setup_rcb(&regs->common_addr, p_hal->dev, p_hal->fast_mode ?  in vdpu382_h264d_gen_regs()
1027         DXVA_PicParams_H264_MVC *pp = p_hal->pp;  in vdpu382_h264d_gen_regs()
1028         mpp_buf_slot_get_prop(p_hal->frame_slots, pp->CurrPic.Index7Bits, SLOT_FRAME_PTR, &mframe);  in vdpu382_h264d_gen_regs()
1035             vdpu382_setup_down_scale(mframe, p_hal->dev, &regs->common);  in vdpu382_h264d_gen_regs()
1044         DXVA_PicParams_H264_MVC *pp = p_hal->pp;  in vdpu382_h264d_gen_regs()
1048         memcpy(ctx->reg_buf[index].RefPicList, p_hal->slice_long->RefPicList,  in vdpu382_h264d_gen_regs()
1049                sizeof(p_hal->slice_long->RefPicList));  in vdpu382_h264d_gen_regs()
1061     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_start()  local
1062     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_start()
1065         (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {  in vdpu382_h264d_start()
1069     Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in vdpu382_h264d_start()
1070     Vdpu382H264dRegSet *regs = p_hal->fast_mode ?  in vdpu382_h264d_start()
1073     MppDev dev = p_hal->dev;  in vdpu382_h264d_start()
1174     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264_get_ref_used()  local
1175     Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in vdpu382_h264_get_ref_used()
1176     Vdpu382H264dRegSet *p_regs = p_hal->fast_mode ?  in vdpu382_h264_get_ref_used()
1190         mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output,  in vdpu382_h264_get_ref_used()
1227     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_wait()  local
1231     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_wait()
1232     Vdpu382H264dRegCtx *reg_ctx = (Vdpu382H264dRegCtx *)p_hal->reg_ctx;  in vdpu382_h264d_wait()
1233     Vdpu382H264dRegSet *p_regs = p_hal->fast_mode ?  in vdpu382_h264d_wait()
1238         (task->dec.flags.ref_err && !p_hal->cfg->base.disable_error)) {  in vdpu382_h264d_wait()
1242     ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_CMD_POLL, NULL);  in vdpu382_h264d_wait()
1259     if (p_hal->dec_cb) {  in vdpu382_h264d_wait()
1266         mpp_callback(p_hal->dec_cb, &param);  in vdpu382_h264d_wait()
1269     if (p_hal->fast_mode)  in vdpu382_h264d_wait()
1280     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_reset()  local
1282     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_reset()
1291     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_flush()  local
1293     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_flush()
1302     H264dHalCtx_t *p_hal = (H264dHalCtx_t *)hal;  in vdpu382_h264d_control()  local
1304     INP_CHECK(ret, NULL == p_hal);  in vdpu382_h264d_control()
1314             mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align_422);  in vdpu382_h264d_control()
1317             vdpu382_afbc_align_calc(p_hal->frame_slots, (MppFrame)param, 16);  in vdpu382_h264d_control()
1319             mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align_256_odds);  in vdpu382_h264d_control()