Lines Matching refs:H264dVdpuRegs_t
43 static MPP_RET set_device_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_reg) in set_device_regs()
87 static MPP_RET set_refer_pic_idx(H264dVdpuRegs_t *p_regs, RK_U32 i, RK_U16 val) in set_refer_pic_idx()
145 static MPP_RET set_refer_pic_list_p(H264dVdpuRegs_t *p_regs, RK_U32 i, in set_refer_pic_list_p()
204 static MPP_RET set_refer_pic_list_b0(H264dVdpuRegs_t *p_regs, RK_U32 i, in set_refer_pic_list_b0()
263 static MPP_RET set_refer_pic_list_b1(H264dVdpuRegs_t *p_regs, RK_U32 i, in set_refer_pic_list_b1()
322 static MPP_RET set_refer_pic_base_addr(H264dVdpuRegs_t *p_regs, RK_U32 i, in set_refer_pic_base_addr()
380 static MPP_RET set_pic_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_regs) in set_pic_regs()
391 static MPP_RET set_vlc_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_regs) in set_vlc_regs()
523 static MPP_RET set_ref_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_regs) in set_ref_regs()
631 static MPP_RET set_asic_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_regs) in set_asic_regs()
822 reg_ctx->reg_buf[i].regs = mpp_calloc_size(void, sizeof(H264dVdpuRegs_t)); in vdpu2_h264d_init()
913 FUN_CHECK(ret = set_device_regs(p_hal, (H264dVdpuRegs_t *)reg_ctx->regs)); in vdpu2_h264d_gen_regs()
914 FUN_CHECK(ret = set_pic_regs(p_hal, (H264dVdpuRegs_t *)reg_ctx->regs)); in vdpu2_h264d_gen_regs()
915 FUN_CHECK(ret = set_vlc_regs(p_hal, (H264dVdpuRegs_t *)reg_ctx->regs)); in vdpu2_h264d_gen_regs()
916 FUN_CHECK(ret = set_ref_regs(p_hal, (H264dVdpuRegs_t *)reg_ctx->regs)); in vdpu2_h264d_gen_regs()
917 FUN_CHECK(ret = set_asic_regs(p_hal, (H264dVdpuRegs_t *)reg_ctx->regs)); in vdpu2_h264d_gen_regs()
937 H264dVdpuRegs_t *p_regs = p_hal->fast_mode ? in vdpu2_h264d_start()
938 (H264dVdpuRegs_t *)reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu2_h264d_start()
939 (H264dVdpuRegs_t *)reg_ctx->regs; in vdpu2_h264d_start()
1031 H264dVdpuRegs_t *p_regs = (H264dVdpuRegs_t *)(p_hal->fast_mode ? in vdpu2_h264d_wait()