237     Vdpu382RegCommon *common = &regs->common;  in init_common_regs()  local
239     common->reg009.dec_mode = 3;  // AVS2  in init_common_regs()
240     common->reg015.rlc_mode = 0;  in init_common_regs()
242     common->reg011.buf_empty_en = 1;  in init_common_regs()
243     common->reg011.err_head_fill_e = 1;  in init_common_regs()
244     common->reg011.err_colmv_fill_e = 1;  in init_common_regs()
246     common->reg010.dec_e = 1;  in init_common_regs()
248     common->reg013.h26x_error_mode = 0;  in init_common_regs()
249     common->reg021.inter_error_prc_mode = 0;  in init_common_regs()
250     common->reg021.error_deb_en = 0;  in init_common_regs()
251     common->reg021.error_intra_mode = 0;  in init_common_regs()
253     common->reg024.cabac_err_en_lowbits = 0xffffffdf;  in init_common_regs()
254     common->reg025.cabac_err_en_highbits = 0x3dffffff;  in init_common_regs()
256     common->reg026.inter_auto_gating_e = 1;  in init_common_regs()
257     common->reg026.filterd_auto_gating_e = 1;  in init_common_regs()
258     common->reg026.strmd_auto_gating_e = 1;  in init_common_regs()
259     common->reg026.mcp_auto_gating_e = 1;  in init_common_regs()
260     common->reg026.busifd_auto_gating_e = 1;  in init_common_regs()
261     common->reg026.dec_ctrl_auto_gating_e = 1;  in init_common_regs()
262     common->reg026.intra_auto_gating_e = 1;  in init_common_regs()
263     common->reg026.mc_auto_gating_e = 1;  in init_common_regs()
264     common->reg026.transd_auto_gating_e = 1;  in init_common_regs()
265     common->reg026.sram_auto_gating_e = 1;  in init_common_regs()
266     common->reg026.cru_auto_gating_e = 1;  in init_common_regs()
267     common->reg026.reg_cfg_gating_en = 1;  in init_common_regs()
269     common->reg032_timeout_threshold = 0x3fffff;  in init_common_regs()
271     common->reg011.dec_clkgate_e = 1;  in init_common_regs()
273     common->reg013.stmerror_waitdecfifo_empty = 1;  in init_common_regs()
274     common->reg012.colmv_compress_en = COLMV_COMPRESS_EN;  in init_common_regs()
275     common->reg012.info_collect_en = 1;  in init_common_regs()
276     common->reg012.error_info_en = 0;  in init_common_regs()
343     if (hw_regs->common.reg012.fbc_e)  in avs2d_refine_rcb_size()
393     Vdpu382RegCommon *common = &p_regs->common;  in fill_registers()  local
415             common->reg012.fbc_e = 1;  in fill_registers()
416             common->reg018.y_hor_virstride = fbc_hdr_stride / 16;  in fill_registers()
417             common->reg019.uv_hor_virstride = fbc_hdr_stride / 16;  in fill_registers()
418             common->reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4;  in fill_registers()
420             common->reg012.fbc_e = 0;  in fill_registers()
421             common->reg018.y_hor_virstride = hor_virstride / 16;  in fill_registers()
422             common->reg019.uv_hor_virstride = hor_virstride / 16;  in fill_registers()
423             common->reg020_y_virstride.y_virstride = y_virstride / 16;  in fill_registers()
425 …common->reg013.cur_pic_is_idr = (pp->picture_type == 0 || pp->picture_type == 4 || pp->picture_typ…  in fill_registers()
523         common->reg016_str_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) + 64;  in fill_registers()
530         vdpu382_setup_down_scale(mframe, p_hal->dev, &p_regs->common);  in fill_registers()
534         p_regs->common.reg012.scale_down_en = 0;  in fill_registers()
726         regs->common.reg012.scanlist_addr_valid_en = 1;  in hal_avs2d_vdpu382_gen_regs()
777     vdpu382_setup_statistic(&regs->common, &regs->statistic);  in hal_avs2d_vdpu382_gen_regs()
804                 ((RK_U32 *)&regs->common)[i]);  in hal_avs2d_vdpu382_dump_reg_write()
892         wr_cfg.reg = &regs->common;  in hal_avs2d_vdpu382_start()
893         wr_cfg.size = sizeof(regs->common);  in hal_avs2d_vdpu382_start()