Lines Matching refs:tegra_sor_write_field

62 static inline void tegra_sor_write_field(struct tegra_dc_sor_data *sor,  in tegra_sor_write_field()  function
75 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dp_disable_tx_pu()
84 tegra_sor_write_field(sor, PR(sor->portnum), mask, pe_reg); in tegra_dp_set_pe_vs_pc()
85 tegra_sor_write_field(sor, DC(sor->portnum), mask, vs_reg); in tegra_dp_set_pe_vs_pc()
87 tegra_sor_write_field(sor, POSTCURSOR(sor->portnum), mask, in tegra_dp_set_pe_vs_pc()
304 tegra_sor_write_field(sor, DP_AUDIO_HBLANK_SYMBOLS, in tegra_dc_sor_set_dp_mode()
308 tegra_sor_write_field(sor, DP_AUDIO_VBLANK_SYMBOLS, in tegra_dc_sor_set_dp_mode()
423 tegra_sor_write_field(sor, CLK_CNTRL, in tegra_dc_sor_set_link_bandwidth()
489 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
496 tegra_sor_write_field(sor, PLL0, PLL0_PWR_MASK | /* PDPLL */ in tegra_dc_sor_power_up()
499 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_power_up()
510 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
516 tegra_sor_write_field(sor, PLL0, in tegra_dc_sor_power_up()
521 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
527 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
669 tegra_sor_write_field(sor, CSTM, in tegra_dc_sor_config_panel()
698 tegra_sor_write_field(sor, CLK_CNTRL, in tegra_dc_sor_enable_dp()
702 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
707 tegra_sor_write_field(sor, PLL3, in tegra_dc_sor_enable_dp()
716 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
734 tegra_sor_write_field(sor, PLL2, PLL2_AUX2_MASK | in tegra_dc_sor_enable_dp()
848 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dc_sor_set_lane_parm()
855 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), 0xf0, 0xf0); in tegra_dc_sor_set_lane_parm()
858 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), 0xf0, 0x0); in tegra_dc_sor_set_lane_parm()
951 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_sor_precharge_lanes()
955 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_sor_precharge_lanes()