Lines Matching refs:splice_crtc_id
1968 rk3588_vop2_load_lut(vop2, cstate->splice_crtc_id, lut_regs, in rockchip_vop2_gamma_lut_init()
2139 vop2_bcsh_reg_update(state, vop2, &bcsh_state, cstate->splice_crtc_id); in vop2_tv_config_update()
2267 plane_mask = &vop2->vp_plane_mask[cstate->splice_crtc_id]; in vop2_post_config()
2268 vop2_setup_dly_for_vp(state, vop2, cstate->splice_crtc_id); in vop2_post_config()
2269 vop2_ops->setup_win_dly(state, cstate->splice_crtc_id, plane_mask->primary_plane_id); in vop2_post_config()
4972 cstate->splice_crtc_id = vop2->data->vp_data[cstate->crtc_id].splice_vp_id; in rockchip_vop2_init()
4973 if (!cstate->splice_crtc_id) { in rockchip_vop2_init()
5046 vop2_dither_setup(vop2, conn_state->bus_format, cstate->splice_crtc_id); in rockchip_vop2_init()
5119 OVL_MODE_SEL_SHIFT + cstate->splice_crtc_id, in rockchip_vop2_init()
5121 vop2_writel(vop2, RK3568_VP0_DSP_BG + (cstate->splice_crtc_id * 0x100), val); in rockchip_vop2_init()
5818 printf("splice mode: open vp%d plane pd fail\n", cstate->splice_crtc_id); in rockchip_vop2_set_plane()
5883 cfg_done |= BIT(cstate->splice_crtc_id) | (BIT(cstate->splice_crtc_id) << 16); in rockchip_vop2_enable()
5993 cfg_done |= BIT(cstate->splice_crtc_id) | (BIT(cstate->splice_crtc_id) << 16); in rockchip_vop2_disable()
6053 if (crtc->splice_mode && cstate->crtc_id == crtc->splice_crtc_id) { in rockchip_vop2_check()
6060 crtc->splice_crtc_id = cstate->splice_crtc_id; in rockchip_vop2_check()