Lines Matching refs:dclk_rate
3482 unsigned long dclk_rate = v_pixclk; in vop2_calc_cru_cfg() local
3507 dclk_rate = dclk_rate >> 1; in vop2_calc_cru_cfg()
3519 dclk_rate = vop2_calc_dclk(dclk_core_rate, in vop2_calc_cru_cfg()
3522 if (!dclk_rate) { in vop2_calc_cru_cfg()
3527 *if_pixclk_div = dclk_rate / if_pixclk_rate; in vop2_calc_cru_cfg()
3528 *if_dclk_div = dclk_rate / if_dclk_rate; in vop2_calc_cru_cfg()
3529 *dclk_core_div = dclk_rate / dclk_core_rate; in vop2_calc_cru_cfg()
3534 dclk_rate, *if_pixclk_div, *if_dclk_div); in vop2_calc_cru_cfg()
3539 dclk_rate = if_pixclk_rate * K; in vop2_calc_cru_cfg()
3540 *dclk_core_div = dclk_rate / dclk_core_rate; in vop2_calc_cru_cfg()
3541 *if_pixclk_div = dclk_rate / if_pixclk_rate; in vop2_calc_cru_cfg()
3547 dclk_rate = vop2_calc_dclk(dclk_out_rate, in vop2_calc_cru_cfg()
3549 if (!dclk_rate) { in vop2_calc_cru_cfg()
3554 *dclk_out_div = dclk_rate / dclk_out_rate; in vop2_calc_cru_cfg()
3555 *dclk_core_div = dclk_rate / dclk_core_rate; in vop2_calc_cru_cfg()
3567 dclk_rate = vop2_calc_dclk(dclk_out_rate, in vop2_calc_cru_cfg()
3569 if (!dclk_rate) { in vop2_calc_cru_cfg()
3571 vop2->data->vp_data[cstate->crtc_id].max_dclk * 1000L, dclk_rate); in vop2_calc_cru_cfg()
3576 dclk_rate /= cstate->dsc_slice_num; in vop2_calc_cru_cfg()
3578 *dclk_out_div = dclk_rate / dclk_out_rate; in vop2_calc_cru_cfg()
3579 *dclk_core_div = dclk_rate / dclk_core_rate; in vop2_calc_cru_cfg()
3585 dclk_rate = v_pixclk; in vop2_calc_cru_cfg()
3586 *dclk_core_div = dclk_rate / dclk_core_rate; in vop2_calc_cru_cfg()
3603 return dclk_rate; in vop2_calc_cru_cfg()
3647 unsigned long dclk_rate; in rk3588_vop2_if_cfg() local
3681 …dclk_rate = vop2_calc_cru_cfg(state, &cstate->dclk_core_div, &cstate->dclk_out_div, &if_pixclk_div… in rk3588_vop2_if_cfg()
3882 return dclk_rate / 1000; in rk3588_vop2_if_cfg()
4487 int *dsc_cds_clk_div, u64 dclk_rate) in vop2_calc_dsc_cru_cfg() argument
4491 *dsc_txp_clk_div = dclk_rate / cstate->dsc_txp_clk_rate; in vop2_calc_dsc_cru_cfg()
4492 *dsc_pxl_clk_div = dclk_rate / cstate->dsc_pxl_clk_rate; in vop2_calc_dsc_cru_cfg()
4493 *dsc_cds_clk_div = dclk_rate / cstate->dsc_cds_clk_rate; in vop2_calc_dsc_cru_cfg()
4532 …atic void vop2_dsc_enable(struct display_state *state, struct vop2 *vop2, u8 dsc_id, u64 dclk_rate) in vop2_dsc_enable() argument
4593 vop2_calc_dsc_cru_cfg(state, &dsc_txp_clk_div, &dsc_pxl_clk_div, &dsc_cds_clk_div, dclk_rate); in vop2_dsc_enable()
4960 unsigned long dclk_rate = 0; in rockchip_vop2_init() local
5006 dclk_rate = rk3588_vop2_if_cfg(state); in rockchip_vop2_init()
5008 dclk_rate = rk3576_vop2_if_cfg(state); in rockchip_vop2_init()
5010 dclk_rate = rk3568_vop2_if_cfg(state); in rockchip_vop2_init()
5012 dclk_rate = rk3562_vop2_if_cfg(state); in rockchip_vop2_init()
5014 dclk_rate = rk3528_vop2_if_cfg(state); in rockchip_vop2_init()
5138 vop2_dsc_enable(state, vop2, 0, dclk_rate * 1000LL); in rockchip_vop2_init()
5139 vop2_dsc_enable(state, vop2, 1, dclk_rate * 1000LL); in rockchip_vop2_init()
5141 vop2_dsc_enable(state, vop2, cstate->dsc_id, dclk_rate * 1000LL); in rockchip_vop2_init()
5200 ret = vop2_clk_set_rate(&hdmi0_phy_pll, dclk_rate / vp_dclk_div * 1000); in rockchip_vop2_init()
5202 ret = vop2_clk_set_rate(&hdmi1_phy_pll, dclk_rate / vp_dclk_div * 1000); in rockchip_vop2_init()
5206 dclk_rate / vp_dclk_div * 1000); in rockchip_vop2_init()
5210 dclk_rate / vp_dclk_div * 1000); in rockchip_vop2_init()
5217 rockchip_phy_set_pll(conn_state->connector->phy, dclk_rate * 1000); in rockchip_vop2_init()
5218 ret = dclk_rate * 1000; in rockchip_vop2_init()
5225 ret = vop2_clk_set_rate(&hdmi_phy_pll, dclk_rate / vp_dclk_div * 1000); in rockchip_vop2_init()
5227 ret = vop2_clk_set_rate(&cstate->dclk, dclk_rate / vp_dclk_div * 1000); in rockchip_vop2_init()
5232 __func__, cstate->crtc_id, dclk_rate, ret); in rockchip_vop2_init()
5238 dclk_div_factor = mode->crtc_clock / dclk_rate; in rockchip_vop2_init()