1637 	u32 plane_mask = cstate->crtc->vps[vp_id].plane_mask;  in vop2_vp_find_attachable_win()
2151 	bg_ovl_dly = cstate->crtc->vps[crtc_id].bg_ovl_dly;  in vop2_setup_dly_for_vp()
2700 		plane_mask = cstate->crtc->vps[i].plane_mask;  in vop2_plane_mask_to_possible_vp_mask()
2733 		plane_mask = cstate->crtc->vps[i].plane_mask;  in vop2_plane_mask_check()
2734 		primary_plane_id = cstate->crtc->vps[i].primary_plane_id;  in vop2_plane_mask_check()
2735 		cursor_plane_id = cstate->crtc->vps[i].cursor_plane_id;  in vop2_plane_mask_check()
2791 		if (assigned_plane_mask & cstate->crtc->vps[i].plane_mask) {  in vop2_plane_mask_check()
2795 		assigned_plane_mask |= cstate->crtc->vps[i].plane_mask;  in vop2_plane_mask_check()
2820 	if (cstate->crtc->vps[vp_id].cursor_plane_id != ROCKCHIP_VOP2_PHY_ID_INVALID) {  in rockchip_cursor_plane_assign()
2821 		win_data = vop2_find_win_by_phys_id(vop2, cstate->crtc->vps[vp_id].cursor_plane_id);  in rockchip_cursor_plane_assign()
2825 					cstate->crtc->vps[vp_id].cursor_plane_id;  in rockchip_cursor_plane_assign()
2873 		if (!cstate->crtc->vps[i].enable)  in rk3528_assign_plane_mask()
2924 		if (cstate->crtc->vps[i].enable)  in rk3568_assign_plane_mask()
2943 			if (!is_hot_plug_devices(cstate->crtc->vps[i].output_type)) {  in rk3568_assign_plane_mask()
2970 		if (i == main_vp_index || !cstate->crtc->vps[i].enable)  in rk3568_assign_plane_mask()
3003 		if (cstate->crtc->vps[i].enable)  in rk3568_assign_plane_mask()
3043 	if (cstate->crtc->assign_plane) {  in vop2_global_initial()
3047 				plane_mask = cstate->crtc->vps[i].plane_mask;  in vop2_global_initial()
3050 				primary_plane_id = cstate->crtc->vps[i].primary_plane_id;  in vop2_global_initial()
3188 	struct rockchip_vp *vp = &cstate->crtc->vps[cstate->crtc_id];  in rockchip_vop2_sharp_init()
3349 	const struct vop2_data *vop2_data = cstate->crtc->data;  in rockchip_vop2_preinit()
3934 		cstate->crtc->vps[cstate->crtc_id].dclk_div = 2; /* div2 */  in rk3576_vop2_if_cfg()
3936 		cstate->crtc->vps[cstate->crtc_id].dclk_div = 1; /* no div */  in rk3576_vop2_if_cfg()
3937 	dclk_in_rate = mode->crtc_clock / cstate->crtc->vps[cstate->crtc_id].dclk_div;  in rk3576_vop2_if_cfg()
4931 	struct rockchip_vp *vp = &cstate->crtc->vps[cstate->crtc_id];  in rockchip_vop2_init()
5185 		vp_dclk_div = cstate->crtc->vps[cstate->crtc_id].dclk_div;  in rockchip_vop2_init()
6025 		if (cstate->crtc->assign_plane)  in rockchip_vop2_fixup_dts()
6051 	struct rockchip_crtc *crtc = cstate->crtc;  in rockchip_vop2_check()  local
6053 	if (crtc->splice_mode && cstate->crtc_id == crtc->splice_crtc_id) {  in rockchip_vop2_check()
6059 		crtc->splice_mode = true;  in rockchip_vop2_check()
6060 		crtc->splice_crtc_id = cstate->splice_crtc_id;  in rockchip_vop2_check()
6277 	if (!cstate->crtc->active)  in rockchip_vop2_regs_dump()
6311 	if (!cstate->crtc->active)  in rockchip_vop2_active_regs_dump()
6510 		cstate->crtc->vps[i].bg_ovl_dly = (vop2->data->nr_mixers - port_mux) << 1;  in rk3568_setup_overlay()
6641 	struct rockchip_crtc *crtc = (struct rockchip_crtc *)dev_get_driver_data(dev);  in rockchip_vop2_reset()  local
6642 	const struct vop2_data *vop2_data = crtc->data;  in rockchip_vop2_reset()