127 static inline void hdmi_writel(struct dw_hdmi_qp *hdmi, u32 val, int offset)  in hdmi_writel()  function
143 	hdmi_writel(hdmi, val, reg);  in hdmi_modb()
295 	hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);  in dw_hdmi_i2c_init()
297 	hdmi_writel(hdmi, 0x085c085c, I2CM_FM_SCL_CONFIG0);  in dw_hdmi_i2c_init()
302 	hdmi_writel(hdmi, I2CM_OP_DONE_CLEAR | I2CM_NACK_RCVD_CLEAR,  in dw_hdmi_i2c_init()
362 					hdmi_writel(hdmi, intr,  in dw_hdmi_i2c_read()
370 				hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);  in dw_hdmi_i2c_read()
378 				hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);  in dw_hdmi_i2c_read()
448 			hdmi_writel(hdmi, *buf++, I2CM_INTERFACE_WRDATA_0_3);  in dw_hdmi_i2c_write()
461 					hdmi_writel(hdmi, intr,  in dw_hdmi_i2c_write()
469 				hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);  in dw_hdmi_i2c_write()
477 				hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);  in dw_hdmi_i2c_write()
727 	hdmi_writel(hdmi, val, PKT_AVI_CONTENTS0);  in hdmi_config_AVI()
738 		hdmi_writel(hdmi, val, PKT_AVI_CONTENTS1 + i * 4);  in hdmi_config_AVI()
768 		hdmi_writel(hdmi, 0, PKT_VSI_CONTENTS0 + i * 4);  in hdmi_config_vendor_specific_infoframe()
804 	hdmi_writel(hdmi, val, PKT_VSI_CONTENTS0);  in hdmi_config_vendor_specific_infoframe()
818 			hdmi_writel(hdmi, val, reg);  in hdmi_config_vendor_specific_infoframe()
823 	hdmi_writel(hdmi, 0, PKT_VSI_CONTENTS7);  in hdmi_config_vendor_specific_infoframe()
861 		hdmi_writel(hdmi, val, PKT0_EMP_CVTEM_CONTENTS0 + i * 0x20);  in hdmi_config_CVTEM()
866 	hdmi_writel(hdmi, val, PKT0_EMP_CVTEM_CONTENTS1);  in hdmi_config_CVTEM()
869 	hdmi_writel(hdmi, val, PKT0_EMP_CVTEM_CONTENTS2);  in hdmi_config_CVTEM()
890 			hdmi_writel(hdmi, val, reg);  in hdmi_config_CVTEM()
897 	hdmi_writel(hdmi, val, PKT4_EMP_CVTEM_CONTENTS6);  in hdmi_config_CVTEM()
901 	hdmi_writel(hdmi, val, PKT4_EMP_CVTEM_CONTENTS7);  in hdmi_config_CVTEM()
904 	hdmi_writel(hdmi, val, PKT5_EMP_CVTEM_CONTENTS1);  in hdmi_config_CVTEM()
907 		hdmi_writel(hdmi, 0, i);  in hdmi_config_CVTEM()
944 	hdmi_writel(hdmi, AVP_DATAPATH_SWINIT_P, GLOBAL_SWRESET_REQUEST);  in hdmi_start_flt()
966 	hdmi_writel(hdmi, ffe_lv, FLT_CONFIG0);  in hdmi_start_flt()
990 				hdmi_writel(hdmi, 0, FLT_CONFIG1);  in hdmi_start_flt()
999 				hdmi_writel(hdmi, value, FLT_CONFIG1);  in hdmi_start_flt()
1054 		hdmi_writel(hdmi, 0, FLT_CONFIG0);  in hdmi_set_op_mode()
1141 		hdmi_writel(hdmi, BIT(20), VIDEO_INTERFACE_CONFIG0);  in dw_hdmi_setup()
1151 		hdmi_writel(hdmi, 0, FLT_CONFIG0);  in dw_hdmi_setup()
1161 				hdmi_writel(hdmi, 1, SCRAMB_CONFIG0);  in dw_hdmi_setup()
1168 				hdmi_writel(hdmi, 0, SCRAMB_CONFIG0);  in dw_hdmi_setup()
1178 		hdmi_writel(hdmi, 2, PKTSCHED_PKT_CONTROL0);  in dw_hdmi_setup()
1191 	hdmi_writel(hdmi, BIT(21), VIDEO_INTERFACE_CONFIG0);  in dw_hdmi_setup()
1283 	hdmi_writel(hdmi, 0, MAINUNIT_0_INT_MASK_N);  in rockchip_dw_hdmi_qp_init()
1284 	hdmi_writel(hdmi, 0, MAINUNIT_1_INT_MASK_N);  in rockchip_dw_hdmi_qp_init()
1285 	hdmi_writel(hdmi, 428571429, TIMER_BASE_CONFIG0);  in rockchip_dw_hdmi_qp_init()
1401 		hdmi_writel(hdmi, 0, I2CM_INTERFACE_CONTROL0);  in rockchip_dw_hdmi_qp_check()