92 	struct ddc_adapter adap;  member
495 static int dw_hdmi_i2c_xfer(struct ddc_adapter *adap,  in dw_hdmi_i2c_xfer()  argument
498 	struct dw_hdmi_qp *hdmi = container_of(adap, struct dw_hdmi_qp, adap);  in dw_hdmi_i2c_xfer()
947 	drm_scdc_writeb(&hdmi->adap, 0x10, 0xff);  in hdmi_start_flt()
951 		drm_scdc_readb(&hdmi->adap, SCDC_STATUS_FLAGS_0, &val);  in hdmi_start_flt()
964 	drm_scdc_writeb(&hdmi->adap, 0x31, val);  in hdmi_start_flt()
971 		drm_scdc_readb(&hdmi->adap, 0x10, &val);  in hdmi_start_flt()
979 			drm_scdc_readb(&hdmi->adap, 0x41, &reg_val);  in hdmi_start_flt()
983 			drm_scdc_readb(&hdmi->adap, 0x42, &reg_val);  in hdmi_start_flt()
1003 		drm_scdc_writeb(&hdmi->adap, 0x10, val);  in hdmi_start_flt()
1055 		drm_scdc_writeb(&hdmi->adap, 0x31, 0);  in hdmi_set_op_mode()
1153 			drm_scdc_writeb(&hdmi->adap, 0x31, 0);  in dw_hdmi_setup()
1156 				drm_scdc_readb(&hdmi->adap, SCDC_SINK_VERSION, &bytes);  in dw_hdmi_setup()
1157 				drm_scdc_writeb(&hdmi->adap, SCDC_SOURCE_VERSION,  in dw_hdmi_setup()
1159 				drm_scdc_set_high_tmds_clock_ratio(&hdmi->adap, 1);  in dw_hdmi_setup()
1160 				drm_scdc_set_scrambling(&hdmi->adap, 1);  in dw_hdmi_setup()
1165 					drm_scdc_set_high_tmds_clock_ratio(&hdmi->adap, 0);  in dw_hdmi_setup()
1166 					drm_scdc_set_scrambling(&hdmi->adap, 0);  in dw_hdmi_setup()
1252 					    &hdmi->adap.i2c_bus);  in rockchip_dw_hdmi_qp_init()
1253 		if (hdmi->adap.i2c_bus)  in rockchip_dw_hdmi_qp_init()
1254 			hdmi->adap.ops = i2c_get_ops(hdmi->adap.i2c_bus);  in rockchip_dw_hdmi_qp_init()
1260 	hdmi->adap.ddc_xfer = dw_hdmi_i2c_xfer;  in rockchip_dw_hdmi_qp_init()
1510 	conn_state->edid = drm_do_get_edid(&hdmi->adap);  in rockchip_dw_hdmi_qp_get_timing()
1538 	conn_state->edid = drm_do_get_edid(&hdmi->adap);  in rockchip_dw_hdmi_qp_get_edid()