88 	ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);  in analogix_dp_enable_rx_to_enhanced_mode()
93 		ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,  in analogix_dp_enable_rx_to_enhanced_mode()
97 		ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,  in analogix_dp_enable_rx_to_enhanced_mode()
129 		ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_CONFIGURATION_CAP,  in analogix_dp_set_enhanced_mode()
148 	ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_training_pattern_dis()
159 	ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_CONFIGURATION_SET, &data);  in analogix_dp_enable_sink_to_assr_mode()
164 		ret = drm_dp_dpcd_writeb(&dp->aux, DP_EDP_CONFIGURATION_SET,  in analogix_dp_enable_sink_to_assr_mode()
167 		ret = drm_dp_dpcd_writeb(&dp->aux, DP_EDP_CONFIGURATION_SET,  in analogix_dp_enable_sink_to_assr_mode()
208 		drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, dp->link_train.lane_count);  in analogix_dp_link_start()
209 		drm_dp_dpcd_writeb(&dp->aux, DP_LINK_RATE_SET, dp->link_rate_select);  in analogix_dp_link_start()
214 		retval = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, 2);  in analogix_dp_link_start()
222 	retval = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, 2);  in analogix_dp_link_start()
251 	retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_link_start()
260 	retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf,  in analogix_dp_link_start()
366 	drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &dpcd);  in analogix_dp_tps3_supported()
383 	retval =  drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2);  in analogix_dp_process_clock_recovery()
394 		retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_process_clock_recovery()
406 		retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1,  in analogix_dp_process_clock_recovery()
446 	retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET,  in analogix_dp_process_clock_recovery()
464 	retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2);  in analogix_dp_process_equalizer_training()
473 	retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, &link_align);  in analogix_dp_process_equalizer_training()
507 	retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1, adjust_request, 2);  in analogix_dp_process_equalizer_training()
514 	retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET,  in analogix_dp_process_equalizer_training()
615 	ret = drm_dp_dpcd_read(&dp->aux, DP_SUPPORTED_LINK_RATES, link_rate_table,  in analogix_dp_init_link_rate_table()
640 	ret = drm_dp_dpcd_readb(&dp->aux, DP_EDP_DPCD_REV, &data);  in analogix_dp_get_max_rx_bandwidth()
662 		ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LINK_RATE, &data);  in analogix_dp_get_max_rx_bandwidth()
682 	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);  in analogix_dp_get_max_rx_lane_count()
712 	drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD, &dpcd);  in analogix_dp_init_training()
848 		ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_enable_scramble()
852 		ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_enable_scramble()
857 		ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_enable_scramble()
861 		ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,  in analogix_dp_enable_scramble()
926 	conn_state->edid = drm_do_get_edid(&dp->aux.ddc);  in analogix_dp_connector_get_edid()
941 	ret = drm_dp_dpcd_readb(&dp->aux, DP_SET_POWER, &value);  in analogix_dp_link_power_up()
948 	ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, value);  in analogix_dp_link_power_up()
965 	ret = drm_dp_dpcd_readb(&dp->aux, DP_SET_POWER, &value);  in analogix_dp_link_power_down()
972 	ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, value);  in analogix_dp_link_power_down()
1085 	ret = drm_dp_dpcd_read(&dp->aux, DP_DPCD_REV, dp->dpcd, DP_RECEIVER_CAP_SIZE);  in analogix_dp_connector_enable()
1237 	conn_state->edid = drm_do_get_edid(&dp->aux.ddc);  in analogix_dp_connector_get_timing()
1388 	dp->aux.name = "analogix-dp";  in analogix_dp_ddc_init()
1389 	dp->aux.dev = dp->dev;  in analogix_dp_ddc_init()
1390 	dp->aux.transfer = analogix_dp_aux_transfer;  in analogix_dp_ddc_init()
1391 	dp->aux.ddc.ddc_xfer = drm_dp_i2c_xfer;  in analogix_dp_ddc_init()