drivers/phy/phy-rockchip-naneng-combphy.c

26 struct combphy_reg {  struct
35 	struct combphy_reg pcie_mode_set;  argument
36 	struct combphy_reg usb_mode_set;
37 	struct combphy_reg sgmii_mode_set;
38 	struct combphy_reg qsgmii_mode_set;
39 	struct combphy_reg pipe_rxterm_set;
40 	struct combphy_reg pipe_txelec_set;
41 	struct combphy_reg pipe_txcomp_set;
42 	struct combphy_reg pipe_clk_24m;
43 	struct combphy_reg pipe_clk_25m;
44 	struct combphy_reg pipe_clk_100m;
45 	struct combphy_reg pipe_phymode_sel;
46 	struct combphy_reg pipe_rate_sel;
47 	struct combphy_reg pipe_rxterm_sel;
48 	struct combphy_reg pipe_txelec_sel;
49 	struct combphy_reg pipe_txcomp_sel;
50 	struct combphy_reg pipe_clk_ext;
51 	struct combphy_reg pipe_sel_usb;
52 	struct combphy_reg pipe_sel_qsgmii;
53 	struct combphy_reg pipe_phy_status;
54 	struct combphy_reg con0_for_pcie;
55 	struct combphy_reg con1_for_pcie;
56 	struct combphy_reg con2_for_pcie;
57 	struct combphy_reg con3_for_pcie;
58 	struct combphy_reg con0_for_sata;
59 	struct combphy_reg con1_for_sata;
60 	struct combphy_reg con2_for_sata;
61 	struct combphy_reg con3_for_sata;
62 	struct combphy_reg pipe_con0_for_sata;
63 	struct combphy_reg pipe_con1_for_sata;
64 	struct combphy_reg pipe_sgmii_mac_sel;
65 	struct combphy_reg pipe_xpcs_phy_ready;
66 	struct combphy_reg u3otg0_clamp_dis;
67 	struct combphy_reg u3otg0_port_en;
68 	struct combphy_reg u3otg1_port_en;
69 	struct combphy_reg u3otg0_pipe_clk_sel;
70 	struct combphy_reg pipe_phy_grf_reset;
92 		       const struct combphy_reg *reg, bool en)  in param_write()