Lines Matching refs:nor
37 static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op in spi_nor_read_write_reg() argument
44 return spi_mem_exec_op(nor->spi, op); in spi_nor_read_write_reg()
47 static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len) in spi_nor_read_reg() argument
55 ret = spi_nor_read_write_reg(nor, &op, val); in spi_nor_read_reg()
63 static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len) in spi_nor_write_reg() argument
70 return spi_nor_read_write_reg(nor, &op, buf); in spi_nor_write_reg()
73 static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, in spi_nor_read_data() argument
77 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1), in spi_nor_read_data()
78 SPI_MEM_OP_ADDR(nor->addr_width, from, 1), in spi_nor_read_data()
79 SPI_MEM_OP_DUMMY(nor->read_dummy, 1), in spi_nor_read_data()
85 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto); in spi_nor_read_data()
86 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto); in spi_nor_read_data()
88 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto); in spi_nor_read_data()
91 op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8; in spi_nor_read_data()
95 ret = spi_mem_adjust_op_size(nor->spi, &op); in spi_nor_read_data()
99 ret = spi_mem_exec_op(nor->spi, &op); in spi_nor_read_data()
111 static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, in spi_nor_write_data() argument
115 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1), in spi_nor_write_data()
116 SPI_MEM_OP_ADDR(nor->addr_width, to, 1), in spi_nor_write_data()
122 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto); in spi_nor_write_data()
123 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto); in spi_nor_write_data()
124 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto); in spi_nor_write_data()
126 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second) in spi_nor_write_data()
129 ret = spi_mem_adjust_op_size(nor->spi, &op); in spi_nor_write_data()
134 ret = spi_mem_exec_op(nor->spi, &op); in spi_nor_write_data()
146 static int read_sr(struct spi_nor *nor) in read_sr() argument
151 ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); in read_sr()
165 static int read_fsr(struct spi_nor *nor) in read_fsr() argument
170 ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1); in read_fsr()
185 static int read_cr(struct spi_nor *nor) in read_cr() argument
190 ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1); in read_cr()
192 dev_dbg(nor->dev, "error %d reading CR\n", ret); in read_cr()
204 static int write_sr(struct spi_nor *nor, u8 val) in write_sr() argument
206 nor->cmd_buf[0] = val; in write_sr()
207 return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1); in write_sr()
215 static int write_cr(struct spi_nor *nor, u8 val) in write_cr() argument
217 nor->cmd_buf[0] = val; in write_cr()
218 return nor->write_reg(nor, SPINOR_OP_WRCR, nor->cmd_buf, 1); in write_cr()
226 static int write_enable(struct spi_nor *nor) in write_enable() argument
228 return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0); in write_enable()
234 static int write_disable(struct spi_nor *nor) in write_disable() argument
236 return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0); in write_disable()
304 static void spi_nor_set_4byte_opcodes(struct spi_nor *nor, in spi_nor_set_4byte_opcodes() argument
311 nor->erase_opcode = SPINOR_OP_SE; in spi_nor_set_4byte_opcodes()
312 nor->mtd.erasesize = info->sector_size; in spi_nor_set_4byte_opcodes()
319 nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode); in spi_nor_set_4byte_opcodes()
320 nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode); in spi_nor_set_4byte_opcodes()
321 nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode); in spi_nor_set_4byte_opcodes()
326 static int set_4byte(struct spi_nor *nor, const struct flash_info *info, in set_4byte() argument
341 write_enable(nor); in set_4byte()
344 status = nor->write_reg(nor, cmd, NULL, 0); in set_4byte()
346 write_disable(nor); in set_4byte()
356 write_enable(nor); in set_4byte()
357 nor->cmd_buf[0] = 0; in set_4byte()
358 nor->write_reg(nor, SPINOR_OP_WREAR, nor->cmd_buf, 1); in set_4byte()
359 write_disable(nor); in set_4byte()
365 nor->cmd_buf[0] = enable << 7; in set_4byte()
366 return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1); in set_4byte()
370 static int spi_nor_sr_ready(struct spi_nor *nor) in spi_nor_sr_ready() argument
372 int sr = read_sr(nor); in spi_nor_sr_ready()
377 if (nor->flags & SNOR_F_USE_CLSR && sr & (SR_E_ERR | SR_P_ERR)) { in spi_nor_sr_ready()
379 dev_dbg(nor->dev, "Erase Error occurred\n"); in spi_nor_sr_ready()
381 dev_dbg(nor->dev, "Programming Error occurred\n"); in spi_nor_sr_ready()
383 nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0); in spi_nor_sr_ready()
390 static int spi_nor_fsr_ready(struct spi_nor *nor) in spi_nor_fsr_ready() argument
392 int fsr = read_fsr(nor); in spi_nor_fsr_ready()
399 dev_err(nor->dev, "Erase operation failed.\n"); in spi_nor_fsr_ready()
401 dev_err(nor->dev, "Program operation failed.\n"); in spi_nor_fsr_ready()
404 dev_err(nor->dev, in spi_nor_fsr_ready()
407 nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); in spi_nor_fsr_ready()
414 static int spi_nor_ready(struct spi_nor *nor) in spi_nor_ready() argument
418 sr = spi_nor_sr_ready(nor); in spi_nor_ready()
421 fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; in spi_nor_ready()
431 static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, in spi_nor_wait_till_ready_with_timeout() argument
440 ret = spi_nor_ready(nor); in spi_nor_wait_till_ready_with_timeout()
447 dev_err(nor->dev, "flash operation timed out\n"); in spi_nor_wait_till_ready_with_timeout()
452 static int spi_nor_wait_till_ready(struct spi_nor *nor) in spi_nor_wait_till_ready() argument
454 return spi_nor_wait_till_ready_with_timeout(nor, in spi_nor_wait_till_ready()
469 static int clean_bar(struct spi_nor *nor) in clean_bar() argument
473 if (nor->bank_curr == 0) in clean_bar()
475 cmd = nor->bank_write_cmd; in clean_bar()
476 nor->bank_curr = 0; in clean_bar()
477 write_enable(nor); in clean_bar()
479 return nor->write_reg(nor, cmd, &bank_sel, 1); in clean_bar()
482 static int write_bar(struct spi_nor *nor, u32 offset) in write_bar() argument
488 if (bank_sel == nor->bank_curr) in write_bar()
491 cmd = nor->bank_write_cmd; in write_bar()
492 write_enable(nor); in write_bar()
493 ret = nor->write_reg(nor, cmd, &bank_sel, 1); in write_bar()
500 nor->bank_curr = bank_sel; in write_bar()
501 return nor->bank_curr; in write_bar()
504 static int read_bar(struct spi_nor *nor, const struct flash_info *info) in read_bar() argument
511 nor->bank_read_cmd = SPINOR_OP_BRRD; in read_bar()
512 nor->bank_write_cmd = SPINOR_OP_BRWR; in read_bar()
515 nor->bank_read_cmd = SPINOR_OP_RDEAR; in read_bar()
516 nor->bank_write_cmd = SPINOR_OP_WREAR; in read_bar()
519 ret = nor->read_reg(nor, nor->bank_read_cmd, in read_bar()
525 nor->bank_curr = curr_bank; in read_bar()
534 static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr) in spi_nor_erase_sector() argument
537 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->erase_opcode, 1), in spi_nor_erase_sector()
538 SPI_MEM_OP_ADDR(nor->addr_width, addr, 1), in spi_nor_erase_sector()
542 if (nor->erase) in spi_nor_erase_sector()
543 return nor->erase(nor, addr); in spi_nor_erase_sector()
549 return spi_mem_exec_op(nor->spi, &op); in spi_nor_erase_sector()
558 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_erase() local
562 dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, in spi_nor_erase()
574 nor->spi->auto_merge_cs_cur = addr < nor->auto_merge_single_chip_size ? 0 : 1; in spi_nor_erase()
575 target = addr - nor->spi->auto_merge_cs_cur * nor->auto_merge_single_chip_size; in spi_nor_erase()
580 ret = write_bar(nor, target); in spi_nor_erase()
584 write_enable(nor); in spi_nor_erase()
586 ret = spi_nor_erase_sector(nor, target); in spi_nor_erase()
593 ret = spi_nor_wait_till_ready(nor); in spi_nor_erase()
600 ret = clean_bar(nor); in spi_nor_erase()
602 write_disable(nor); in spi_nor_erase()
609 static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask) in write_sr_and_check() argument
613 write_enable(nor); in write_sr_and_check()
614 ret = write_sr(nor, status_new); in write_sr_and_check()
618 ret = spi_nor_wait_till_ready(nor); in write_sr_and_check()
622 ret = read_sr(nor); in write_sr_and_check()
629 static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, in stm_get_locked_range() argument
632 struct mtd_info *mtd = &nor->mtd; in stm_get_locked_range()
644 if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB) in stm_get_locked_range()
655 static int stm_check_lock_status_sr(struct spi_nor *nor, loff_t ofs, u64 len, in stm_check_lock_status_sr() argument
664 stm_get_locked_range(nor, sr, &lock_offs, &lock_len); in stm_check_lock_status_sr()
674 static int stm_is_locked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len, in stm_is_locked_sr() argument
677 return stm_check_lock_status_sr(nor, ofs, len, sr, true); in stm_is_locked_sr()
680 static int stm_is_unlocked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len, in stm_is_unlocked_sr() argument
683 return stm_check_lock_status_sr(nor, ofs, len, sr, false); in stm_is_unlocked_sr()
718 static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_lock() argument
720 struct mtd_info *mtd = &nor->mtd; in stm_lock()
725 bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB; in stm_lock()
728 status_old = read_sr(nor); in stm_lock()
733 if (stm_is_locked_sr(nor, ofs, len, status_old)) in stm_lock()
737 if (!stm_is_locked_sr(nor, 0, ofs, status_old)) in stm_lock()
741 if (!stm_is_locked_sr(nor, ofs + len, mtd->size - (ofs + len), in stm_lock()
790 return write_sr_and_check(nor, status_new, mask); in stm_lock()
798 static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_unlock() argument
800 struct mtd_info *mtd = &nor->mtd; in stm_unlock()
805 bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB; in stm_unlock()
808 status_old = read_sr(nor); in stm_unlock()
813 if (stm_is_unlocked_sr(nor, ofs, len, status_old)) in stm_unlock()
817 if (!stm_is_unlocked_sr(nor, 0, ofs, status_old)) in stm_unlock()
821 if (!stm_is_unlocked_sr(nor, ofs + len, mtd->size - (ofs + len), in stm_unlock()
873 return write_sr_and_check(nor, status_new, mask); in stm_unlock()
883 static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_is_locked() argument
887 status = read_sr(nor); in stm_is_locked()
891 return stm_is_locked_sr(nor, ofs, len, status); in stm_is_locked()
895 static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) in spi_nor_read_id() argument
901 tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN); in spi_nor_read_id()
903 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
915 dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", in spi_nor_read_id()
923 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_read() local
926 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
933 if (addr < nor->auto_merge_single_chip_size && (addr + len) > nor->auto_merge_single_chip_size) in spi_nor_read()
934 read_len = nor->auto_merge_single_chip_size - addr; in spi_nor_read()
935 nor->spi->auto_merge_cs_cur = addr < nor->auto_merge_single_chip_size ? 0 : 1; in spi_nor_read()
936 addr -= nor->spi->auto_merge_cs_cur * nor->auto_merge_single_chip_size; in spi_nor_read()
942 ret = write_bar(nor, addr); in spi_nor_read()
945 remain_len = (SZ_16M * (nor->bank_curr + 1)) - addr; in spi_nor_read()
953 ret = nor->read(nor, addr, read_len, buf); in spi_nor_read()
971 ret = clean_bar(nor); in spi_nor_read()
1018 static int sst26_lock_ctl(struct spi_nor *nor, loff_t ofs, uint64_t len, enum lock_ctl ctl) in sst26_lock_ctl() argument
1020 struct mtd_info *mtd = &nor->mtd; in sst26_lock_ctl()
1028 dev_err(nor->dev, "length or offset is not 64KiB allighned\n"); in sst26_lock_ctl()
1033 dev_err(nor->dev, "range is more than device size: %#llx + %#llx > %#llx\n", in sst26_lock_ctl()
1046 ret = nor->read_reg(nor, SPINOR_OP_READ_BPR, bpr_buff, bpr_size); in sst26_lock_ctl()
1048 dev_err(nor->dev, "fail to read block-protection register\n"); in sst26_lock_ctl()
1111 ret = nor->write_reg(nor, SPINOR_OP_WRITE_BPR, bpr_buff, bpr_size); in sst26_lock_ctl()
1113 dev_err(nor->dev, "fail to write block-protection register\n"); in sst26_lock_ctl()
1120 static int sst26_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) in sst26_unlock() argument
1122 return sst26_lock_ctl(nor, ofs, len, SST26_CTL_UNLOCK); in sst26_unlock()
1125 static int sst26_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) in sst26_lock() argument
1127 return sst26_lock_ctl(nor, ofs, len, SST26_CTL_LOCK); in sst26_lock()
1134 static int sst26_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) in sst26_is_locked() argument
1145 return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK); in sst26_is_locked()
1148 static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len, in sst_write_byteprogram() argument
1155 nor->program_opcode = SPINOR_OP_BP; in sst_write_byteprogram()
1157 write_enable(nor); in sst_write_byteprogram()
1159 ret = nor->write(nor, to, 1, buf + actual); in sst_write_byteprogram()
1162 ret = spi_nor_wait_till_ready(nor); in sst_write_byteprogram()
1169 write_disable(nor); in sst_write_byteprogram()
1176 struct spi_nor *nor = mtd_to_spi_nor(mtd); in sst_write() local
1177 struct spi_slave *spi = nor->spi; in sst_write()
1181 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in sst_write()
1183 return sst_write_byteprogram(nor, to, len, retlen, buf); in sst_write()
1185 write_enable(nor); in sst_write()
1187 nor->sst_write_second = false; in sst_write()
1192 nor->program_opcode = SPINOR_OP_BP; in sst_write()
1195 ret = nor->write(nor, to, 1, buf); in sst_write()
1198 ret = spi_nor_wait_till_ready(nor); in sst_write()
1206 nor->program_opcode = SPINOR_OP_AAI_WP; in sst_write()
1209 ret = nor->write(nor, to, 2, buf + actual); in sst_write()
1212 ret = spi_nor_wait_till_ready(nor); in sst_write()
1216 nor->sst_write_second = true; in sst_write()
1218 nor->sst_write_second = false; in sst_write()
1220 write_disable(nor); in sst_write()
1221 ret = spi_nor_wait_till_ready(nor); in sst_write()
1227 write_enable(nor); in sst_write()
1229 nor->program_opcode = SPINOR_OP_BP; in sst_write()
1230 ret = nor->write(nor, to, 1, buf + actual); in sst_write()
1233 ret = spi_nor_wait_till_ready(nor); in sst_write()
1236 write_disable(nor); in sst_write()
1252 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_write() local
1256 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in spi_nor_write()
1263 nor->spi->auto_merge_cs_cur = addr < nor->auto_merge_single_chip_size ? 0 : 1; in spi_nor_write()
1264 addr -= nor->spi->auto_merge_cs_cur * nor->auto_merge_single_chip_size; in spi_nor_write()
1275 if (hweight32(nor->page_size) == 1) { in spi_nor_write()
1276 page_offset = addr & (nor->page_size - 1); in spi_nor_write()
1280 page_offset = do_div(aux, nor->page_size); in spi_nor_write()
1284 nor->page_size - page_offset, len - i); in spi_nor_write()
1287 ret = write_bar(nor, addr); in spi_nor_write()
1291 write_enable(nor); in spi_nor_write()
1292 ret = nor->write(nor, addr, page_remain, buf + i); in spi_nor_write()
1297 ret = spi_nor_wait_till_ready(nor); in spi_nor_write()
1306 ret = clean_bar(nor); in spi_nor_write()
1322 static int macronix_quad_enable(struct spi_nor *nor) in macronix_quad_enable() argument
1326 val = read_sr(nor); in macronix_quad_enable()
1332 write_enable(nor); in macronix_quad_enable()
1334 write_sr(nor, val | SR_QUAD_EN_MX); in macronix_quad_enable()
1336 ret = spi_nor_wait_till_ready(nor); in macronix_quad_enable()
1340 ret = read_sr(nor); in macronix_quad_enable()
1342 dev_err(nor->dev, "Macronix Quad bit not set\n"); in macronix_quad_enable()
1357 static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr) in write_sr_cr() argument
1361 write_enable(nor); in write_sr_cr()
1363 ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2); in write_sr_cr()
1365 dev_dbg(nor->dev, in write_sr_cr()
1370 ret = spi_nor_wait_till_ready(nor); in write_sr_cr()
1372 dev_dbg(nor->dev, in write_sr_cr()
1393 static int spansion_read_cr_quad_enable(struct spi_nor *nor) in spansion_read_cr_quad_enable() argument
1399 ret = read_cr(nor); in spansion_read_cr_quad_enable()
1411 ret = read_sr(nor); in spansion_read_cr_quad_enable()
1418 ret = write_sr_cr(nor, sr_cr); in spansion_read_cr_quad_enable()
1423 ret = read_cr(nor); in spansion_read_cr_quad_enable()
1425 dev_dbg(nor->dev, "Spansion Quad bit not set\n"); in spansion_read_cr_quad_enable()
1446 static int spansion_no_read_cr_quad_enable(struct spi_nor *nor) in spansion_no_read_cr_quad_enable() argument
1452 ret = read_sr(nor); in spansion_no_read_cr_quad_enable()
1454 dev_dbg(nor->dev, "error while reading status register\n"); in spansion_no_read_cr_quad_enable()
1460 return write_sr_cr(nor, sr_cr); in spansion_no_read_cr_quad_enable()
1477 static int normem_quad_enable(struct spi_nor *nor) in normem_quad_enable() argument
1481 val = read_cr(nor); in normem_quad_enable()
1487 write_enable(nor); in normem_quad_enable()
1489 write_cr(nor, val | SR_QUAD_EN_NORMEM); in normem_quad_enable()
1491 ret = spi_nor_wait_till_ready(nor); in normem_quad_enable()
1495 ret = read_cr(nor); in normem_quad_enable()
1497 dev_err(nor->dev, "NORMEM Quad bit not set\n"); in normem_quad_enable()
1567 int (*quad_enable)(struct spi_nor *nor);
1610 static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr, in spi_nor_read_sfdp() argument
1616 read_opcode = nor->read_opcode; in spi_nor_read_sfdp()
1617 addr_width = nor->addr_width; in spi_nor_read_sfdp()
1618 read_dummy = nor->read_dummy; in spi_nor_read_sfdp()
1620 nor->read_opcode = SPINOR_OP_RDSFDP; in spi_nor_read_sfdp()
1621 nor->addr_width = 3; in spi_nor_read_sfdp()
1622 nor->read_dummy = 8; in spi_nor_read_sfdp()
1625 ret = nor->read(nor, addr, len, (u8 *)buf); in spi_nor_read_sfdp()
1640 nor->read_opcode = read_opcode; in spi_nor_read_sfdp()
1641 nor->addr_width = addr_width; in spi_nor_read_sfdp()
1642 nor->read_dummy = read_dummy; in spi_nor_read_sfdp()
1889 static int spi_nor_wr_quad_enable(struct spi_nor *nor) in spi_nor_wr_quad_enable() argument
1893 val = read_cr(nor); in spi_nor_wr_quad_enable()
1899 write_enable(nor); in spi_nor_wr_quad_enable()
1901 write_cr(nor, val | CR_QUAD_EN_SPAN); in spi_nor_wr_quad_enable()
1903 ret = spi_nor_wait_till_ready(nor); in spi_nor_wr_quad_enable()
1907 ret = read_cr(nor); in spi_nor_wr_quad_enable()
1909 dev_err(nor->dev, "Configure register Quad bit not set, ret=%x\n", ret); in spi_nor_wr_quad_enable()
1946 static int spi_nor_parse_bfpt(struct spi_nor *nor, in spi_nor_parse_bfpt() argument
1950 struct mtd_info *mtd = &nor->mtd; in spi_nor_parse_bfpt()
1966 err = spi_nor_read_sfdp(nor, addr, len, &bfpt); in spi_nor_parse_bfpt()
1977 nor->addr_width = 3; in spi_nor_parse_bfpt()
1981 nor->addr_width = 4; in spi_nor_parse_bfpt()
2041 nor->erase_opcode = opcode; in spi_nor_parse_bfpt()
2047 nor->erase_opcode = opcode; in spi_nor_parse_bfpt()
2107 static int spi_nor_parse_sfdp(struct spi_nor *nor, in spi_nor_parse_sfdp() argument
2117 err = spi_nor_read_sfdp(nor, 0, sizeof(header), &header); in spi_nor_parse_sfdp()
2153 err = spi_nor_read_sfdp(nor, sizeof(header), in spi_nor_parse_sfdp()
2176 err = spi_nor_parse_bfpt(nor, bfpt_header, params); in spi_nor_parse_sfdp()
2202 static int spi_nor_parse_sfdp(struct spi_nor *nor, in spi_nor_parse_sfdp() argument
2209 static int spi_nor_init_params(struct spi_nor *nor, in spi_nor_init_params() argument
2292 nor->addr_width = 0; in spi_nor_init_params()
2293 nor->mtd.erasesize = 0; in spi_nor_init_params()
2299 if (spi_nor_parse_sfdp(nor, &sfdp_params)) { in spi_nor_init_params()
2300 nor->addr_width = 0; in spi_nor_init_params()
2301 nor->mtd.erasesize = 0; in spi_nor_init_params()
2361 static int spi_nor_select_read(struct spi_nor *nor, in spi_nor_select_read() argument
2376 nor->read_opcode = read->opcode; in spi_nor_select_read()
2377 nor->read_proto = read->proto; in spi_nor_select_read()
2389 nor->read_dummy = read->num_mode_clocks + read->num_wait_states; in spi_nor_select_read()
2393 static int spi_nor_select_pp(struct spi_nor *nor, in spi_nor_select_pp() argument
2408 nor->program_opcode = pp->opcode; in spi_nor_select_pp()
2409 nor->write_proto = pp->proto; in spi_nor_select_pp()
2413 static int spi_nor_select_erase(struct spi_nor *nor, in spi_nor_select_erase() argument
2416 struct mtd_info *mtd = &nor->mtd; in spi_nor_select_erase()
2425 nor->erase_opcode = SPINOR_OP_BE_4K; in spi_nor_select_erase()
2428 nor->erase_opcode = SPINOR_OP_BE_4K_PMC; in spi_nor_select_erase()
2433 nor->erase_opcode = SPINOR_OP_SE; in spi_nor_select_erase()
2439 static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, in spi_nor_setup() argument
2460 dev_dbg(nor->dev, in spi_nor_setup()
2466 err = spi_nor_select_read(nor, params, shared_mask); in spi_nor_setup()
2468 dev_dbg(nor->dev, in spi_nor_setup()
2474 err = spi_nor_select_pp(nor, params, shared_mask); in spi_nor_setup()
2476 dev_dbg(nor->dev, in spi_nor_setup()
2482 err = spi_nor_select_erase(nor, info); in spi_nor_setup()
2484 dev_dbg(nor->dev, in spi_nor_setup()
2490 enable_quad_io = (spi_nor_get_protocol_width(nor->read_proto) == 4 || in spi_nor_setup()
2491 spi_nor_get_protocol_width(nor->write_proto) == 4); in spi_nor_setup()
2493 nor->quad_enable = params->quad_enable; in spi_nor_setup()
2495 nor->quad_enable = NULL; in spi_nor_setup()
2500 static int spi_nor_init(struct spi_nor *nor) in spi_nor_init() argument
2508 if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL || in spi_nor_init()
2509 JEDEC_MFR(nor->info) == SNOR_MFR_INTEL || in spi_nor_init()
2510 JEDEC_MFR(nor->info) == SNOR_MFR_SST || in spi_nor_init()
2511 nor->info->flags & SPI_NOR_HAS_LOCK) { in spi_nor_init()
2512 write_enable(nor); in spi_nor_init()
2513 write_sr(nor, 0); in spi_nor_init()
2514 spi_nor_wait_till_ready(nor); in spi_nor_init()
2517 if (nor->quad_enable) { in spi_nor_init()
2518 err = nor->quad_enable(nor); in spi_nor_init()
2520 dev_dbg(nor->dev, "quad mode not supported\n"); in spi_nor_init()
2525 if (nor->addr_width == 4 && in spi_nor_init()
2526 (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) && in spi_nor_init()
2527 !(nor->info->flags & SPI_NOR_4B_OPCODES)) { in spi_nor_init()
2535 if (nor->flags & SNOR_F_BROKEN_RESET) in spi_nor_init()
2537 set_4byte(nor, nor->info, 1); in spi_nor_init()
2543 int spi_nor_scan(struct spi_nor *nor) in spi_nor_scan() argument
2547 struct mtd_info *mtd = &nor->mtd; in spi_nor_scan()
2553 struct spi_slave *spi = nor->spi; in spi_nor_scan()
2557 nor->reg_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
2558 nor->read_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
2559 nor->write_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
2560 nor->read = spi_nor_read_data; in spi_nor_scan()
2561 nor->write = spi_nor_write_data; in spi_nor_scan()
2562 nor->read_reg = spi_nor_read_reg; in spi_nor_scan()
2563 nor->write_reg = spi_nor_write_reg; in spi_nor_scan()
2586 info = spi_nor_read_id(nor); in spi_nor_scan()
2590 ret = spi_nor_init_params(nor, info, ¶ms); in spi_nor_scan()
2596 mtd->priv = nor; in spi_nor_scan()
2610 nor->flash_lock = stm_lock; in spi_nor_scan()
2611 nor->flash_unlock = stm_unlock; in spi_nor_scan()
2612 nor->flash_is_locked = stm_is_locked; in spi_nor_scan()
2622 nor->flash_lock = sst26_lock; in spi_nor_scan()
2623 nor->flash_unlock = sst26_unlock; in spi_nor_scan()
2624 nor->flash_is_locked = sst26_is_locked; in spi_nor_scan()
2635 nor->flags |= SNOR_F_USE_FSR; in spi_nor_scan()
2637 nor->flags |= SNOR_F_HAS_SR_TB; in spi_nor_scan()
2639 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; in spi_nor_scan()
2641 nor->flags |= SNOR_F_USE_CLSR; in spi_nor_scan()
2646 nor->page_size = params.page_size; in spi_nor_scan()
2647 mtd->writebufsize = nor->page_size; in spi_nor_scan()
2660 ret = spi_nor_setup(nor, info, ¶ms, &hwcaps); in spi_nor_scan()
2664 if (nor->addr_width) { in spi_nor_scan()
2667 nor->addr_width = info->addr_width; in spi_nor_scan()
2671 nor->addr_width = 4; in spi_nor_scan()
2674 spi_nor_set_4byte_opcodes(nor, info); in spi_nor_scan()
2677 nor->addr_width = 3; in spi_nor_scan()
2678 ret = read_bar(nor, info); in spi_nor_scan()
2683 nor->addr_width = 3; in spi_nor_scan()
2686 if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) { in spi_nor_scan()
2688 nor->addr_width); in spi_nor_scan()
2693 nor->info = info; in spi_nor_scan()
2694 ret = spi_nor_init(nor); in spi_nor_scan()
2698 nor->name = mtd->name; in spi_nor_scan()
2699 nor->size = mtd->size; in spi_nor_scan()
2700 nor->erase_size = mtd->erasesize; in spi_nor_scan()
2701 nor->sector_size = mtd->erasesize; in spi_nor_scan()
2705 printf("SF: Detected %s with page size ", nor->name); in spi_nor_scan()
2706 print_size(nor->page_size, ", erase size "); in spi_nor_scan()
2707 print_size(nor->erase_size, ", total "); in spi_nor_scan()
2708 print_size(nor->size, ""); in spi_nor_scan()
2713 nor->auto_merge_single_chip_size = nor->size; in spi_nor_scan()
2714 nor->spi->auto_merge_cs_cur = 1; in spi_nor_scan()
2715 if (IS_ERR(spi_nor_read_id(nor))) { in spi_nor_scan()
2719 ret = spi_nor_init(nor); in spi_nor_scan()
2722 nor->size = nor->size * 2; in spi_nor_scan()
2731 int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) in spi_flash_cmd_get_sw_write_prot() argument
2733 int sr = read_sr(nor); in spi_flash_cmd_get_sw_write_prot()