81 		*(u32 *)buf = __raw_readl(nand);  in nand_davinci_read_buf()
170 	ecc = __raw_readl(&(davinci_emif_regs->nandfecc[  in nand_davinci_readecc()
183 	val = __raw_readl(&davinci_emif_regs->nandfcr);  in nand_davinci_enable_hwecc()
485 		val = __raw_readl(&davinci_emif_regs->nandfcr);  in nand_davinci_4bit_enable_hwecc()
493 		val = __raw_readl(&davinci_emif_regs->nand4bitecc[0]);  in nand_davinci_4bit_enable_hwecc()
505 		ecc[i] = __raw_readl(&davinci_emif_regs->nand4bitecc[i]) &  in nand_davinci_4bit_readecc()
627 	val = __raw_readl(&davinci_emif_regs->nandfsr);  in nand_davinci_4bit_correct_data()
643 	val = __raw_readl(&davinci_emif_regs->nanderradd1);  in nand_davinci_4bit_correct_data()
660 		val = __raw_readl(&davinci_emif_regs->nandfsr);  in nand_davinci_4bit_correct_data()
671 		val = __raw_readl(&davinci_emif_regs->nandfsr);  in nand_davinci_4bit_correct_data()
676 	iserror = __raw_readl(&davinci_emif_regs->nandfsr);  in nand_davinci_4bit_correct_data()
691 		val = __raw_readl(&davinci_emif_regs->nanderrval1);  in nand_davinci_4bit_correct_data()
694 		val = __raw_readl(&davinci_emif_regs->nanderrval1);  in nand_davinci_4bit_correct_data()
698 	numerrors = ((__raw_readl(&davinci_emif_regs->nandfsr) >> 16)  in nand_davinci_4bit_correct_data()
705 			    ((__raw_readl(&davinci_emif_regs->nanderradd2) >>  in nand_davinci_4bit_correct_data()
709 			    ((__raw_readl(&davinci_emif_regs->nanderrval2) >>  in nand_davinci_4bit_correct_data()
713 			    ((__raw_readl(&davinci_emif_regs->nanderradd1) >>  in nand_davinci_4bit_correct_data()
717 			    ((__raw_readl(&davinci_emif_regs->nanderrval1) >>  in nand_davinci_4bit_correct_data()
731 	return __raw_readl(&davinci_emif_regs->nandfsr) & 0x1;  in nand_davinci_dev_ready()