202 	int src_clk_div;  in rv1108_saradc_set_clk()  local
204 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;  in rv1108_saradc_set_clk()
205 	assert(src_clk_div < 128);  in rv1108_saradc_set_clk()
209 		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);  in rv1108_saradc_set_clk()
227 	int src_clk_div;  in rv1108_aclk_vio1_set_clk()  local
229 	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;  in rv1108_aclk_vio1_set_clk()
230 	assert(src_clk_div < 32);  in rv1108_aclk_vio1_set_clk()
234 		     (src_clk_div << ACLK_VIO1_CLK_DIV_SHIFT) |  in rv1108_aclk_vio1_set_clk()
253 	int src_clk_div;  in rv1108_aclk_vio0_set_clk()  local
255 	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;  in rv1108_aclk_vio0_set_clk()
256 	assert(src_clk_div < 32);  in rv1108_aclk_vio0_set_clk()
260 		     (src_clk_div << ACLK_VIO0_CLK_DIV_SHIFT) |  in rv1108_aclk_vio0_set_clk()
288 	int src_clk_div;  in rv1108_dclk_vop_set_clk()  local
290 	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;  in rv1108_dclk_vop_set_clk()
291 	assert(src_clk_div < 64);  in rv1108_dclk_vop_set_clk()
296 		     (src_clk_div << DCLK_VOP_CLK_DIV_SHIFT) |  in rv1108_dclk_vop_set_clk()
317 	int src_clk_div;  in rv1108_aclk_bus_set_clk()  local
320 	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;  in rv1108_aclk_bus_set_clk()
321 	assert(src_clk_div < 32);  in rv1108_aclk_bus_set_clk()
325 		     (src_clk_div << ACLK_BUS_DIV_CON_SHIFT) |  in rv1108_aclk_bus_set_clk()
369 	int src_clk_div;  in rv1108_aclk_peri_set_clk()  local
372 	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;  in rv1108_aclk_peri_set_clk()
373 	assert(src_clk_div < 32);  in rv1108_aclk_peri_set_clk()
377 		     (src_clk_div << ACLK_PERI_DIV_CON_SHIFT) |  in rv1108_aclk_peri_set_clk()
385 	int src_clk_div;  in rv1108_hclk_peri_set_clk()  local
388 	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;  in rv1108_hclk_peri_set_clk()
389 	assert(src_clk_div < 32);  in rv1108_hclk_peri_set_clk()
393 		     (src_clk_div << HCLK_PERI_DIV_CON_SHIFT));  in rv1108_hclk_peri_set_clk()
400 	int src_clk_div;  in rv1108_pclk_peri_set_clk()  local
403 	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;  in rv1108_pclk_peri_set_clk()
404 	assert(src_clk_div < 32);  in rv1108_pclk_peri_set_clk()
408 		     (src_clk_div << PCLK_PERI_DIV_CON_SHIFT));  in rv1108_pclk_peri_set_clk()
448 	int src_clk_div;  in rv1108_i2c_set_clk()  local
451 	src_clk_div = GPLL_HZ / hz;  in rv1108_i2c_set_clk()
452 	assert(src_clk_div - 1 <= 127);  in rv1108_i2c_set_clk()
458 			     (src_clk_div << CLK_I2C0_DIV_CON_SHIFT) |  in rv1108_i2c_set_clk()
464 			     (src_clk_div << CLK_I2C1_DIV_CON_SHIFT) |  in rv1108_i2c_set_clk()
470 			     (src_clk_div << CLK_I2C2_DIV_CON_SHIFT) |  in rv1108_i2c_set_clk()
476 			     (src_clk_div << CLK_I2C3_DIV_CON_SHIFT) |  in rv1108_i2c_set_clk()