338 			src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);  in rk3588_top_set_clk()
341 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_top_set_clk()
352 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_top_set_clk()
694 			src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);  in rk3588_adc_set_clk()
704 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_adc_set_clk()
717 			src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);  in rk3588_adc_set_clk()
727 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_adc_set_clk()
823 			div = DIV_ROUND_UP(OSC_HZ, rate);  in rk3588_mmc_set_clk()
826 			div = DIV_ROUND_UP(priv->cpll_hz, rate);  in rk3588_mmc_set_clk()
829 			div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_mmc_set_clk()
835 			div = DIV_ROUND_UP(priv->cpll_hz, rate);  in rk3588_mmc_set_clk()
838 			div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_mmc_set_clk()
844 			div = DIV_ROUND_UP(702 * MHz, rate);  in rk3588_mmc_set_clk()
847 			div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_mmc_set_clk()
929 	div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_aux16m_set_clk()
1017 			div = DIV_ROUND_UP(priv->cpll_hz, rate);  in rk3588_aclk_vop_set_clk()
1020 			div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_aclk_vop_set_clk()
1161 			div = DIV_ROUND_UP(pll_rate, rate);  in rk3588_dclk_vop_set_clk()
1167 			div = DIV_ROUND_UP(RK3588_VOP_PLL_LIMIT_FREQ, rate);  in rk3588_dclk_vop_set_clk()
1197 			div = DIV_ROUND_UP(pll_rate, rate);  in rk3588_dclk_vop_set_clk()
1287 	div = DIV_ROUND_UP(priv->cpll_hz, rate);  in rk3588_gmac_set_clk()
1393 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_uart_set_rate()
1397 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3588_uart_set_rate()
1504 		div = DIV_ROUND_UP(priv->ppll_hz, rate);  in rk3588_pciephy_set_rate()
2064 	div = DIV_ROUND_UP(GPLL_HZ, 300 * MHz);  in rk3588_clk_init()
2382 			div = DIV_ROUND_UP(OSC_HZ, rate);  in rk3588_clk_scmi_set_rate()
2387 			div = DIV_ROUND_UP(SPLL_RATE, rate);  in rk3588_clk_scmi_set_rate()
2392 			div = DIV_ROUND_UP(GPLL_RATE, rate);  in rk3588_clk_scmi_set_rate()
2400 			div = DIV_ROUND_UP(SPLL_RATE, rate);  in rk3588_clk_scmi_set_rate()
2405 			div = DIV_ROUND_UP(GPLL_RATE, rate);  in rk3588_clk_scmi_set_rate()