Lines Matching refs:rate
172 u32 con, sel, div, rate; in rk3576_bus_get_clk() local
182 rate = DIV_TO_RATE(priv->cpll_hz , div); in rk3576_bus_get_clk()
184 rate = DIV_TO_RATE(priv->gpll_hz, div); in rk3576_bus_get_clk()
191 rate = 198 * MHz; in rk3576_bus_get_clk()
193 rate = 100 * MHz; in rk3576_bus_get_clk()
195 rate = 50 * MHz; in rk3576_bus_get_clk()
197 rate = OSC_HZ; in rk3576_bus_get_clk()
204 rate = 100 * MHz; in rk3576_bus_get_clk()
206 rate = 50 * MHz; in rk3576_bus_get_clk()
208 rate = OSC_HZ; in rk3576_bus_get_clk()
214 return rate; in rk3576_bus_get_clk()
218 ulong clk_id, ulong rate) in rk3576_bus_set_clk() argument
225 if (!(priv->cpll_hz % rate)) { in rk3576_bus_set_clk()
227 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_bus_set_clk()
230 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_bus_set_clk()
244 if (rate >= 198 * MHz) in rk3576_bus_set_clk()
246 else if (rate >= 99 * MHz) in rk3576_bus_set_clk()
248 else if (rate >= 50 * MHz) in rk3576_bus_set_clk()
257 if (rate >= 99 * MHz) in rk3576_bus_set_clk()
259 else if (rate >= 50 * MHz) in rk3576_bus_set_clk()
278 u32 con, sel, div, rate, prate; in rk3576_top_get_clk() local
309 rate = 100 * MHz; in rk3576_top_get_clk()
311 rate = 50 * MHz; in rk3576_top_get_clk()
313 rate = OSC_HZ; in rk3576_top_get_clk()
319 rate = 200 * MHz; in rk3576_top_get_clk()
321 rate = 100 * MHz; in rk3576_top_get_clk()
323 rate = 50 * MHz; in rk3576_top_get_clk()
325 rate = OSC_HZ; in rk3576_top_get_clk()
331 return rate; in rk3576_top_get_clk()
335 ulong clk_id, ulong rate) in rk3576_top_set_clk() argument
342 if (!(priv->cpll_hz % rate)) { in rk3576_top_set_clk()
344 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_top_set_clk()
347 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_top_set_clk()
358 if (!(priv->cpll_hz % rate)) { in rk3576_top_set_clk()
360 src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_top_set_clk()
363 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_top_set_clk()
373 if (rate >= 99 * MHz) in rk3576_top_set_clk()
375 else if (rate >= 50 * MHz) in rk3576_top_set_clk()
384 if (rate >= 198 * MHz) in rk3576_top_set_clk()
386 else if (rate >= 99 * MHz) in rk3576_top_set_clk()
388 else if (rate >= 50 * MHz) in rk3576_top_set_clk()
408 ulong rate; in rk3576_i2c_get_clk() local
456 rate = 200 * MHz; in rk3576_i2c_get_clk()
458 rate = 100 * MHz; in rk3576_i2c_get_clk()
460 rate = 50 * MHz; in rk3576_i2c_get_clk()
462 rate = OSC_HZ; in rk3576_i2c_get_clk()
464 return rate; in rk3576_i2c_get_clk()
468 ulong rate) in rk3576_i2c_set_clk() argument
473 if (rate >= 198 * MHz) in rk3576_i2c_set_clk()
475 else if (rate >= 99 * MHz) in rk3576_i2c_set_clk()
477 if (rate >= 50 * MHz) in rk3576_i2c_set_clk()
574 ulong clk_id, ulong rate) in rk3576_spi_set_clk() argument
579 if (rate >= 198 * MHz) in rk3576_spi_set_clk()
581 else if (rate >= 99 * MHz) in rk3576_spi_set_clk()
583 else if (rate >= 50 * MHz) in rk3576_spi_set_clk()
656 ulong clk_id, ulong rate) in rk3576_pwm_set_clk() argument
661 if (rate >= 99 * MHz) in rk3576_pwm_set_clk()
663 else if (rate >= 50 * MHz) in rk3576_pwm_set_clk()
719 ulong clk_id, ulong rate) in rk3576_adc_set_clk() argument
726 if (!(OSC_HZ % rate)) { in rk3576_adc_set_clk()
727 src_clk_div = DIV_ROUND_UP(OSC_HZ, rate); in rk3576_adc_set_clk()
737 src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_adc_set_clk()
749 src_clk_div = DIV_ROUND_UP(OSC_HZ, rate); in rk3576_adc_set_clk()
860 ulong clk_id, ulong rate) in rk3576_mmc_set_clk() argument
874 if (!(OSC_HZ % rate)) { in rk3576_mmc_set_clk()
876 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3576_mmc_set_clk()
877 } else if (!(priv->cpll_hz % rate)) { in rk3576_mmc_set_clk()
879 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_mmc_set_clk()
882 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_mmc_set_clk()
886 if (rate >= 198 * MHz) in rk3576_mmc_set_clk()
888 else if (rate >= 99 * MHz) in rk3576_mmc_set_clk()
890 else if (rate >= 50 * MHz) in rk3576_mmc_set_clk()
896 if (!(priv->spll_hz % rate)) { in rk3576_mmc_set_clk()
898 div = DIV_ROUND_UP(priv->spll_hz, rate); in rk3576_mmc_set_clk()
901 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_mmc_set_clk()
1044 ulong clk_id, ulong rate) in rk3576_aclk_vop_set_clk() argument
1052 if (rate == 700 * MHz) { in rk3576_aclk_vop_set_clk()
1055 } else if (!(priv->cpll_hz % rate)) { in rk3576_aclk_vop_set_clk()
1057 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_aclk_vop_set_clk()
1060 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_aclk_vop_set_clk()
1069 if (!(priv->cpll_hz % rate)) { in rk3576_aclk_vop_set_clk()
1071 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_aclk_vop_set_clk()
1074 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_aclk_vop_set_clk()
1083 if (!(priv->cpll_hz % rate)) { in rk3576_aclk_vop_set_clk()
1085 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_aclk_vop_set_clk()
1088 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_aclk_vop_set_clk()
1097 if (rate == 200 * MHz) in rk3576_aclk_vop_set_clk()
1099 else if (rate == 100 * MHz) in rk3576_aclk_vop_set_clk()
1101 else if (rate == 50 * MHz) in rk3576_aclk_vop_set_clk()
1110 if (rate == 100 * MHz) in rk3576_aclk_vop_set_clk()
1112 else if (rate == 50 * MHz) in rk3576_aclk_vop_set_clk()
1173 ulong clk_id, ulong rate) in rk3576_dclk_vop_set_clk() argument
1215 if (pll_rate >= RK3576_VOP_PLL_LIMIT_FREQ && pll_rate % rate == 0) { in rk3576_dclk_vop_set_clk()
1216 div = DIV_ROUND_UP(pll_rate, rate); in rk3576_dclk_vop_set_clk()
1222 div = DIV_ROUND_UP(RK3576_VOP_PLL_LIMIT_FREQ, rate); in rk3576_dclk_vop_set_clk()
1230 priv->cru, VPLL, div * rate); in rk3576_dclk_vop_set_clk()
1257 div = DIV_ROUND_UP(pll_rate, rate); in rk3576_dclk_vop_set_clk()
1261 if (abs(rate - now) < abs(rate - best_rate)) { in rk3576_dclk_vop_set_clk()
1276 printf("do not support this vop freq %lu\n", rate); in rk3576_dclk_vop_set_clk()
1315 ulong clk_id, ulong rate) in rk3576_clk_csihost_set_clk() argument
1357 div = DIV_ROUND_UP(pll_rate, rate); in rk3576_clk_csihost_set_clk()
1361 if (abs(rate - now) < abs(rate - best_rate)) { in rk3576_clk_csihost_set_clk()
1375 printf("do not support this vop freq %lu\n", rate); in rk3576_clk_csihost_set_clk()
1433 ulong clk_id, ulong rate) in rk3576_dclk_ebc_set_clk() argument
1448 pll_rate % rate == 0) { in rk3576_dclk_ebc_set_clk()
1449 div = DIV_ROUND_UP(pll_rate, rate); in rk3576_dclk_ebc_set_clk()
1455 rate); in rk3576_dclk_ebc_set_clk()
1463 VPLL, div * rate); in rk3576_dclk_ebc_set_clk()
1469 rk3576_dclk_ebc_set_clk(priv, DCLK_EBC_FRAC_SRC, rate); in rk3576_dclk_ebc_set_clk()
1470 div = rk3576_dclk_ebc_get_clk(priv, DCLK_EBC_FRAC_SRC) / rate; in rk3576_dclk_ebc_set_clk()
1497 div = DIV_ROUND_UP(pll_rate, rate); in rk3576_dclk_ebc_set_clk()
1501 if (abs(rate - now) < abs(rate - best_rate)) { in rk3576_dclk_ebc_set_clk()
1518 rate); in rk3576_dclk_ebc_set_clk()
1526 rational_best_approximation(rate, priv->gpll_hz, in rk3576_dclk_ebc_set_clk()
1602 ulong clk_id, ulong rate) in rk3576_gmac_set_clk() argument
1607 div = DIV_ROUND_UP(priv->cpll_hz, rate); in rk3576_gmac_set_clk()
1612 if (rate == GMAC0_PTP_REFCLK_IN) { in rk3576_gmac_set_clk()
1615 } else if (!(priv->gpll_hz % rate)) { in rk3576_gmac_set_clk()
1617 div = priv->gpll_hz / rate; in rk3576_gmac_set_clk()
1620 div = priv->cpll_hz / rate; in rk3576_gmac_set_clk()
1629 if (rate == GMAC1_PTP_REFCLK_IN) { in rk3576_gmac_set_clk()
1632 } else if (!(priv->gpll_hz % rate)) { in rk3576_gmac_set_clk()
1634 div = priv->gpll_hz / rate; in rk3576_gmac_set_clk()
1637 div = priv->cpll_hz / rate; in rk3576_gmac_set_clk()
1701 ulong clk_id, ulong rate) in rk3576_uart_frac_set_rate() argument
1707 if (priv->cpll_hz % rate == 0) { in rk3576_uart_frac_set_rate()
1710 } else if (rate == OSC_HZ) { in rk3576_uart_frac_set_rate()
1717 rational_best_approximation(rate, p_rate, in rk3576_uart_frac_set_rate()
1836 ulong clk_id, ulong rate) in rk3576_uart_set_rate() argument
1841 if (!(priv->gpll_hz % rate)) { in rk3576_uart_set_rate()
1843 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_uart_set_rate()
1844 } else if (!(priv->cpll_hz % rate)) { in rk3576_uart_set_rate()
1846 div = DIV_ROUND_UP(priv->gpll_hz, rate); in rk3576_uart_set_rate()
1847 } else if (!(rk3576_uart_frac_get_rate(priv, CLK_UART_FRAC_0) % rate)) { in rk3576_uart_set_rate()
1849 div = DIV_ROUND_UP(rk3576_uart_frac_get_rate(priv, CLK_UART_FRAC_0), rate); in rk3576_uart_set_rate()
1850 } else if (!(rk3576_uart_frac_get_rate(priv, CLK_UART_FRAC_1) % rate)) { in rk3576_uart_set_rate()
1852 div = DIV_ROUND_UP(rk3576_uart_frac_get_rate(priv, CLK_UART_FRAC_1), rate); in rk3576_uart_set_rate()
1853 } else if (!(rk3576_uart_frac_get_rate(priv, CLK_UART_FRAC_2) % rate)) { in rk3576_uart_set_rate()
1855 div = DIV_ROUND_UP(rk3576_uart_frac_get_rate(priv, CLK_UART_FRAC_2), rate); in rk3576_uart_set_rate()
1856 } else if (!(OSC_HZ % rate)) { in rk3576_uart_set_rate()
1858 div = DIV_ROUND_UP(OSC_HZ, rate); in rk3576_uart_set_rate()
1866 if (rate == OSC_HZ) { in rk3576_uart_set_rate()
1963 ulong clk_id, ulong rate) in rk3576_ref_clkout_set_clk() argument
2008 div = DIV_ROUND_UP(p_rate, rate); in rk3576_ref_clkout_set_clk()
2012 if (abs(rate - now) < abs(rate - best_rate)) { in rk3576_ref_clkout_set_clk()
2027 printf("do not support this vop freq %lu\n", rate); in rk3576_ref_clkout_set_clk()
2055 ulong rate = 0; in rk3576_clk_get_rate() local
2069 rate = rockchip_pll_get_rate(&rk3576_pll_clks[LPLL], priv->cru, in rk3576_clk_get_rate()
2071 priv->lpll_hz = rate; in rk3576_clk_get_rate()
2074 rate = rockchip_pll_get_rate(&rk3576_pll_clks[BPLL], priv->cru, in rk3576_clk_get_rate()
2076 priv->bpll_hz = rate; in rk3576_clk_get_rate()
2079 rate = rockchip_pll_get_rate(&rk3576_pll_clks[GPLL], priv->cru, in rk3576_clk_get_rate()
2083 rate = rockchip_pll_get_rate(&rk3576_pll_clks[CPLL], priv->cru, in rk3576_clk_get_rate()
2087 rate = rockchip_pll_get_rate(&rk3576_pll_clks[VPLL], priv->cru, in rk3576_clk_get_rate()
2091 rate = rockchip_pll_get_rate(&rk3576_pll_clks[AUPLL], priv->cru, in rk3576_clk_get_rate()
2095 rate = rockchip_pll_get_rate(&rk3576_pll_clks[PPLL], priv->cru, in rk3576_clk_get_rate()
2101 rate = rk3576_bus_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2107 rate = rk3576_top_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2119 rate = rk3576_i2c_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2126 rate = rk3576_spi_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2131 rate = rk3576_pwm_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2135 rate = rk3576_adc_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2147 rate = rk3576_mmc_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2150 rate = OSC_HZ; in rk3576_clk_get_rate()
2159 rate = rk3576_aclk_vop_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2167 rate = rk3576_dclk_vop_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2175 rate = rk3576_gmac_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2180 rate = rk3576_uart_frac_get_rate(priv, clk->id); in rk3576_clk_get_rate()
2194 rate = rk3576_uart_get_rate(priv, clk->id); in rk3576_clk_get_rate()
2197 rate = rk3576_clk_csihost_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2201 rate = rk3576_dclk_ebc_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2206 rate = rk3576_ref_clkout_get_clk(priv, clk->id); in rk3576_clk_get_rate()
2211 rate = rk3576_ufs_ref_get_rate(priv, clk->id); in rk3576_clk_get_rate()
2218 return rate; in rk3576_clk_get_rate()
2221 static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate) in rk3576_clk_set_rate() argument
2238 CPLL, rate); in rk3576_clk_set_rate()
2244 GPLL, rate); in rk3576_clk_set_rate()
2250 VPLL, rate); in rk3576_clk_set_rate()
2256 AUPLL, rate); in rk3576_clk_set_rate()
2262 PPLL, rate); in rk3576_clk_set_rate()
2269 ret = rk3576_bus_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2275 ret = rk3576_top_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2287 ret = rk3576_i2c_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2294 ret = rk3576_spi_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2299 ret = rk3576_pwm_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2303 ret = rk3576_adc_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2315 ret = rk3576_mmc_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2327 ret = rk3576_aclk_vop_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2335 ret = rk3576_dclk_vop_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2343 ret = rk3576_gmac_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2348 ret = rk3576_uart_frac_set_rate(priv, clk->id, rate); in rk3576_clk_set_rate()
2362 ret = rk3576_uart_set_rate(priv, clk->id, rate); in rk3576_clk_set_rate()
2365 ret = rk3576_clk_csihost_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2369 ret = rk3576_dclk_ebc_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2374 ret = rk3576_ref_clkout_set_clk(priv, clk->id, rate); in rk3576_clk_set_rate()
2711 unsigned long rate; in soc_clk_dump() local
2739 rate = clk_get_rate(&clk); in soc_clk_dump()
2741 if (rate < 0) in soc_clk_dump()
2746 rate / 1000); in soc_clk_dump()